net/mlx5: fix E-Switch egress mirror flow validation

[dpdk.git] / drivers / net / bnxt / meson.build

diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build
index 1f7df9d..0926556 100644 (file)
--- a/drivers/net/bnxt/meson.build
+++ b/drivers/net/bnxt/meson.build
@@ -2,7 +2,13 @@
 # Copyright(c) 2018 Intel Corporation
 # Copyright(c) 2020 Broadcom
 
-install_headers('rte_pmd_bnxt.h')
+if is_windows
+       build = false
+       reason = 'not supported on Windows'
+       subdir_done()
+endif
+
+headers = files('rte_pmd_bnxt.h')
 
 includes += include_directories('tf_ulp')
 includes += include_directories('tf_core')
@@ -28,7 +34,8 @@ sources = files('bnxt_cpr.c',
        'tf_core/tf_msg.c',
        'tf_core/rand.c',
        'tf_core/stack.c',
-       'tf_core/tf_em.c',
+        'tf_core/tf_em_common.c',
+        'tf_core/tf_em_internal.c',
        'tf_core/tf_rm.c',
        'tf_core/tf_tbl.c',
        'tf_core/tfp.c',
@@ -38,10 +45,16 @@ sources = files('bnxt_cpr.c',
        'tf_core/tf_identifier.c',
        'tf_core/tf_shadow_tbl.c',
        'tf_core/tf_shadow_tcam.c',
-       'tf_core/tf_tbl_type.c',
        'tf_core/tf_tcam.c',
        'tf_core/tf_util.c',
-       'tf_core/tf_rm_new.c',
+       'tf_core/tf_if_tbl.c',
+       'tf_core/ll.c',
+       'tf_core/tf_global_cfg.c',
+       'tf_core/tf_em_host.c',
+       'tf_core/tf_shadow_identifier.c',
+       'tf_core/tf_hash.c',
+
+       'hcapi/hcapi_cfa_p4.c',
 
        'tf_ulp/bnxt_ulp.c',
        'tf_ulp/ulp_mark_mgr.c',
@@ -55,9 +68,18 @@ sources = files('bnxt_cpr.c',
        'tf_ulp/ulp_rte_parser.c',
        'tf_ulp/bnxt_ulp_flow.c',
        'tf_ulp/ulp_port_db.c',
+       'tf_ulp/ulp_def_rules.c',
+       'tf_ulp/ulp_fc_mgr.c',
+       'tf_ulp/ulp_tun.c',
+       'tf_ulp/ulp_template_db_wh_plus_act.c',
+       'tf_ulp/ulp_template_db_wh_plus_class.c',
+       'tf_ulp/ulp_template_db_stingray_act.c',
+       'tf_ulp/ulp_template_db_stingray_class.c',
 
        'rte_pmd_bnxt.c')
 
 if arch_subdir == 'x86'
        sources += files('bnxt_rxtx_vec_sse.c')
+elif arch_subdir == 'arm' and host_machine.cpu_family().startswith('aarch64')
+       sources += files('bnxt_rxtx_vec_neon.c')
 endif