}
/**
- * Device specific function that retrieves the WC TCAM slices the
+ * Device specific function that set the WC TCAM slices the
* device supports.
*
* [in] tfp
* Pointer to TF handle
*
- * [out] slice_size
- * Pointer to the WC TCAM slice size
+ * [in] num_slices_per_row
+ * The WC TCAM row slice configuration
+ *
+ * Returns
+ * - (0) if successful.
+ * - (-EINVAL) on failure.
+ */
+static int
+tf_dev_p4_set_tcam_slice_info(struct tf *tfp __rte_unused,
+ enum tf_wc_num_slice num_slices_per_row)
+{
+ switch (num_slices_per_row) {
+ case TF_WC_TCAM_1_SLICE_PER_ROW:
+ case TF_WC_TCAM_2_SLICE_PER_ROW:
+ case TF_WC_TCAM_4_SLICE_PER_ROW:
+ g_wc_num_slices_per_row = num_slices_per_row;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/**
+ * Device specific function that retrieves the TCAM slices the
+ * device supports.
+ *
+ * [in] tfp
+ * Pointer to TF handle
+ *
+ * [in] type
+ * TF TCAM type
+ *
+ * [in] key_sz
+ * The key size
*
* [out] num_slices_per_row
* Pointer to the WC TCAM row slice configuration
uint16_t *num_slices_per_row)
{
/* Single slice support */
-#define CFA_P4_WC_TCAM_SLICES_PER_ROW 1
#define CFA_P4_WC_TCAM_SLICE_SIZE 12
if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
- *num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;
+ *num_slices_per_row = g_wc_num_slices_per_row;
if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)
return -ENOTSUP;
} else { /* for other type of tcam */
return ((((size) + 31) >> 5) * 4);
}
+/**
+ * Indicates whether the index table type is SRAM managed
+ *
+ * [in] tfp
+ * Pointer to TF handle
+ *
+ * [in] type
+ * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
+ *
+ * Returns
+ * - (0) if the table is not managed by the SRAM manager
+ * - (1) if the table is managed by the SRAM manager
+ */
+static bool tf_dev_p4_is_sram_managed(struct tf *tfp __rte_unused,
+ enum tf_tbl_type type __rte_unused)
+{
+ return false;
+}
/**
* Truflow P4 device specific functions
*/
const struct tf_dev_ops tf_dev_ops_p4_init = {
.tf_dev_get_max_types = tf_dev_p4_get_max_types,
.tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
+ .tf_dev_set_tcam_slice_info = tf_dev_p4_set_tcam_slice_info,
.tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
.tf_dev_alloc_ident = NULL,
.tf_dev_free_ident = NULL,
.tf_dev_search_ident = NULL,
.tf_dev_get_ident_resc_info = NULL,
.tf_dev_get_tbl_info = NULL,
+ .tf_dev_is_sram_managed = tf_dev_p4_is_sram_managed,
.tf_dev_alloc_ext_tbl = NULL,
.tf_dev_alloc_tbl = NULL,
+ .tf_dev_alloc_sram_tbl = NULL,
.tf_dev_free_ext_tbl = NULL,
.tf_dev_free_tbl = NULL,
- .tf_dev_alloc_search_tbl = NULL,
+ .tf_dev_free_sram_tbl = NULL,
.tf_dev_set_tbl = NULL,
.tf_dev_set_ext_tbl = NULL,
+ .tf_dev_set_sram_tbl = NULL,
.tf_dev_get_tbl = NULL,
+ .tf_dev_get_sram_tbl = NULL,
.tf_dev_get_bulk_tbl = NULL,
+ .tf_dev_get_bulk_sram_tbl = NULL,
.tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment,
.tf_dev_get_tbl_resc_info = NULL,
.tf_dev_alloc_tcam = NULL,
const struct tf_dev_ops tf_dev_ops_p4 = {
.tf_dev_get_max_types = tf_dev_p4_get_max_types,
.tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
+ .tf_dev_set_tcam_slice_info = tf_dev_p4_set_tcam_slice_info,
.tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
.tf_dev_alloc_ident = tf_ident_alloc,
.tf_dev_free_ident = tf_ident_free,
.tf_dev_search_ident = tf_ident_search,
.tf_dev_get_ident_resc_info = tf_ident_get_resc_info,
.tf_dev_get_tbl_info = NULL,
+ .tf_dev_is_sram_managed = tf_dev_p4_is_sram_managed,
.tf_dev_alloc_tbl = tf_tbl_alloc,
.tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
+ .tf_dev_alloc_sram_tbl = tf_tbl_alloc,
.tf_dev_free_tbl = tf_tbl_free,
.tf_dev_free_ext_tbl = tf_tbl_ext_free,
- .tf_dev_alloc_search_tbl = tf_tbl_alloc_search,
+ .tf_dev_free_sram_tbl = tf_tbl_free,
.tf_dev_set_tbl = tf_tbl_set,
.tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
+ .tf_dev_set_sram_tbl = NULL,
.tf_dev_get_tbl = tf_tbl_get,
+ .tf_dev_get_sram_tbl = NULL,
.tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
+ .tf_dev_get_bulk_sram_tbl = NULL,
.tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment,
.tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info,
#ifdef TF_TCAM_SHARED