uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
[BNXT_ULP_CLASS_HID_0138] = 1,
[BNXT_ULP_CLASS_HID_03f0] = 2,
- [BNXT_ULP_CLASS_HID_0134] = 3,
- [BNXT_ULP_CLASS_HID_03fc] = 4,
- [BNXT_ULP_CLASS_HID_0139] = 5,
- [BNXT_ULP_CLASS_HID_03f1] = 6,
- [BNXT_ULP_CLASS_HID_068b] = 7,
- [BNXT_ULP_CLASS_HID_0143] = 8,
- [BNXT_ULP_CLASS_HID_0135] = 9,
- [BNXT_ULP_CLASS_HID_03fd] = 10,
- [BNXT_ULP_CLASS_HID_0687] = 11,
- [BNXT_ULP_CLASS_HID_014f] = 12,
- [BNXT_ULP_CLASS_HID_0118] = 13,
- [BNXT_ULP_CLASS_HID_03d0] = 14,
- [BNXT_ULP_CLASS_HID_0114] = 15,
- [BNXT_ULP_CLASS_HID_03dc] = 16,
- [BNXT_ULP_CLASS_HID_0119] = 17,
- [BNXT_ULP_CLASS_HID_03d1] = 18,
- [BNXT_ULP_CLASS_HID_06ab] = 19,
- [BNXT_ULP_CLASS_HID_0163] = 20,
- [BNXT_ULP_CLASS_HID_0115] = 21,
- [BNXT_ULP_CLASS_HID_03dd] = 22,
- [BNXT_ULP_CLASS_HID_06a7] = 23,
- [BNXT_ULP_CLASS_HID_016f] = 24,
- [BNXT_ULP_CLASS_HID_0128] = 25,
- [BNXT_ULP_CLASS_HID_03e0] = 26,
- [BNXT_ULP_CLASS_HID_0124] = 27,
- [BNXT_ULP_CLASS_HID_03ec] = 28,
- [BNXT_ULP_CLASS_HID_0129] = 29,
- [BNXT_ULP_CLASS_HID_03e1] = 30,
- [BNXT_ULP_CLASS_HID_069b] = 31,
- [BNXT_ULP_CLASS_HID_0153] = 32,
+ [BNXT_ULP_CLASS_HID_0139] = 3,
+ [BNXT_ULP_CLASS_HID_03f1] = 4,
+ [BNXT_ULP_CLASS_HID_068b] = 5,
+ [BNXT_ULP_CLASS_HID_0143] = 6,
+ [BNXT_ULP_CLASS_HID_0118] = 7,
+ [BNXT_ULP_CLASS_HID_03d0] = 8,
+ [BNXT_ULP_CLASS_HID_0119] = 9,
+ [BNXT_ULP_CLASS_HID_03d1] = 10,
+ [BNXT_ULP_CLASS_HID_06ab] = 11,
+ [BNXT_ULP_CLASS_HID_0163] = 12,
+ [BNXT_ULP_CLASS_HID_0128] = 13,
+ [BNXT_ULP_CLASS_HID_03e0] = 14,
+ [BNXT_ULP_CLASS_HID_0129] = 15,
+ [BNXT_ULP_CLASS_HID_03e1] = 16,
+ [BNXT_ULP_CLASS_HID_069b] = 17,
+ [BNXT_ULP_CLASS_HID_0153] = 18,
+ [BNXT_ULP_CLASS_HID_0134] = 19,
+ [BNXT_ULP_CLASS_HID_03fc] = 20,
+ [BNXT_ULP_CLASS_HID_0135] = 21,
+ [BNXT_ULP_CLASS_HID_03fd] = 22,
+ [BNXT_ULP_CLASS_HID_0687] = 23,
+ [BNXT_ULP_CLASS_HID_014f] = 24,
+ [BNXT_ULP_CLASS_HID_0114] = 25,
+ [BNXT_ULP_CLASS_HID_03dc] = 26,
+ [BNXT_ULP_CLASS_HID_0115] = 27,
+ [BNXT_ULP_CLASS_HID_03dd] = 28,
+ [BNXT_ULP_CLASS_HID_06a7] = 29,
+ [BNXT_ULP_CLASS_HID_016f] = 30,
+ [BNXT_ULP_CLASS_HID_0124] = 31,
+ [BNXT_ULP_CLASS_HID_03ec] = 32,
[BNXT_ULP_CLASS_HID_0125] = 33,
[BNXT_ULP_CLASS_HID_03ed] = 34,
[BNXT_ULP_CLASS_HID_0697] = 35,
[BNXT_ULP_CLASS_HID_065d] = 98,
[BNXT_ULP_CLASS_HID_0623] = 99,
[BNXT_ULP_CLASS_HID_00eb] = 100,
- [BNXT_ULP_CLASS_HID_0768] = 101,
- [BNXT_ULP_CLASS_HID_073c] = 102,
- [BNXT_ULP_CLASS_HID_04bc] = 103,
- [BNXT_ULP_CLASS_HID_0442] = 104,
- [BNXT_ULP_CLASS_HID_050a] = 105,
- [BNXT_ULP_CLASS_HID_06ba] = 106,
- [BNXT_ULP_CLASS_HID_0472] = 107,
- [BNXT_ULP_CLASS_HID_0700] = 108,
- [BNXT_ULP_CLASS_HID_04c8] = 109,
- [BNXT_ULP_CLASS_HID_0678] = 110,
- [BNXT_ULP_CLASS_HID_064f] = 111,
- [BNXT_ULP_CLASS_HID_051d] = 112,
- [BNXT_ULP_CLASS_HID_06a5] = 113,
- [BNXT_ULP_CLASS_HID_0455] = 114,
- [BNXT_ULP_CLASS_HID_04bd] = 115,
- [BNXT_ULP_CLASS_HID_0443] = 116,
- [BNXT_ULP_CLASS_HID_050b] = 117,
- [BNXT_ULP_CLASS_HID_06bb] = 118,
- [BNXT_ULP_CLASS_HID_050d] = 119,
- [BNXT_ULP_CLASS_HID_04d3] = 120,
- [BNXT_ULP_CLASS_HID_059b] = 121,
- [BNXT_ULP_CLASS_HID_070b] = 122,
- [BNXT_ULP_CLASS_HID_0473] = 123,
- [BNXT_ULP_CLASS_HID_0701] = 124,
- [BNXT_ULP_CLASS_HID_04c9] = 125,
- [BNXT_ULP_CLASS_HID_0679] = 126,
- [BNXT_ULP_CLASS_HID_048b] = 127,
- [BNXT_ULP_CLASS_HID_0749] = 128,
- [BNXT_ULP_CLASS_HID_05f1] = 129,
- [BNXT_ULP_CLASS_HID_04b7] = 130,
- [BNXT_ULP_CLASS_HID_049b] = 131,
- [BNXT_ULP_CLASS_HID_0759] = 132,
- [BNXT_ULP_CLASS_HID_05e1] = 133,
- [BNXT_ULP_CLASS_HID_04a7] = 134,
- [BNXT_ULP_CLASS_HID_0301] = 135,
- [BNXT_ULP_CLASS_HID_07f9] = 136,
- [BNXT_ULP_CLASS_HID_0397] = 137,
- [BNXT_ULP_CLASS_HID_068f] = 138,
- [BNXT_ULP_CLASS_HID_02f1] = 139,
- [BNXT_ULP_CLASS_HID_0609] = 140,
- [BNXT_ULP_CLASS_HID_0267] = 141,
- [BNXT_ULP_CLASS_HID_077f] = 142,
- [BNXT_ULP_CLASS_HID_01e1] = 143,
- [BNXT_ULP_CLASS_HID_0329] = 144,
- [BNXT_ULP_CLASS_HID_01dd] = 145,
- [BNXT_ULP_CLASS_HID_0315] = 146,
- [BNXT_ULP_CLASS_HID_01c1] = 147,
- [BNXT_ULP_CLASS_HID_0309] = 148,
- [BNXT_ULP_CLASS_HID_003d] = 149,
- [BNXT_ULP_CLASS_HID_02f5] = 150,
- [BNXT_ULP_CLASS_HID_01d1] = 151,
- [BNXT_ULP_CLASS_HID_0319] = 152,
- [BNXT_ULP_CLASS_HID_01cd] = 153,
- [BNXT_ULP_CLASS_HID_0305] = 154,
- [BNXT_ULP_CLASS_HID_01e2] = 155,
- [BNXT_ULP_CLASS_HID_032a] = 156,
- [BNXT_ULP_CLASS_HID_0650] = 157,
- [BNXT_ULP_CLASS_HID_0198] = 158,
- [BNXT_ULP_CLASS_HID_01de] = 159,
- [BNXT_ULP_CLASS_HID_0316] = 160,
- [BNXT_ULP_CLASS_HID_066c] = 161,
- [BNXT_ULP_CLASS_HID_01a4] = 162,
- [BNXT_ULP_CLASS_HID_01c2] = 163,
- [BNXT_ULP_CLASS_HID_030a] = 164,
- [BNXT_ULP_CLASS_HID_0670] = 165,
- [BNXT_ULP_CLASS_HID_01b8] = 166,
- [BNXT_ULP_CLASS_HID_003e] = 167,
- [BNXT_ULP_CLASS_HID_02f6] = 168,
- [BNXT_ULP_CLASS_HID_078c] = 169,
- [BNXT_ULP_CLASS_HID_0044] = 170,
- [BNXT_ULP_CLASS_HID_01d2] = 171,
- [BNXT_ULP_CLASS_HID_031a] = 172,
- [BNXT_ULP_CLASS_HID_0660] = 173,
- [BNXT_ULP_CLASS_HID_01a8] = 174,
- [BNXT_ULP_CLASS_HID_01ce] = 175,
- [BNXT_ULP_CLASS_HID_0306] = 176,
- [BNXT_ULP_CLASS_HID_067c] = 177,
- [BNXT_ULP_CLASS_HID_01b4] = 178
+ [BNXT_ULP_CLASS_HID_04bc] = 101,
+ [BNXT_ULP_CLASS_HID_0442] = 102,
+ [BNXT_ULP_CLASS_HID_050a] = 103,
+ [BNXT_ULP_CLASS_HID_06ba] = 104,
+ [BNXT_ULP_CLASS_HID_0472] = 105,
+ [BNXT_ULP_CLASS_HID_0700] = 106,
+ [BNXT_ULP_CLASS_HID_04c8] = 107,
+ [BNXT_ULP_CLASS_HID_0678] = 108,
+ [BNXT_ULP_CLASS_HID_061f] = 109,
+ [BNXT_ULP_CLASS_HID_05ad] = 110,
+ [BNXT_ULP_CLASS_HID_06a5] = 111,
+ [BNXT_ULP_CLASS_HID_0455] = 112,
+ [BNXT_ULP_CLASS_HID_05dd] = 113,
+ [BNXT_ULP_CLASS_HID_0563] = 114,
+ [BNXT_ULP_CLASS_HID_059b] = 115,
+ [BNXT_ULP_CLASS_HID_070b] = 116,
+ [BNXT_ULP_CLASS_HID_04bd] = 117,
+ [BNXT_ULP_CLASS_HID_0443] = 118,
+ [BNXT_ULP_CLASS_HID_050b] = 119,
+ [BNXT_ULP_CLASS_HID_06bb] = 120,
+ [BNXT_ULP_CLASS_HID_0473] = 121,
+ [BNXT_ULP_CLASS_HID_0701] = 122,
+ [BNXT_ULP_CLASS_HID_04c9] = 123,
+ [BNXT_ULP_CLASS_HID_0679] = 124,
+ [BNXT_ULP_CLASS_HID_05e2] = 125,
+ [BNXT_ULP_CLASS_HID_00b0] = 126,
+ [BNXT_ULP_CLASS_HID_0648] = 127,
+ [BNXT_ULP_CLASS_HID_03f8] = 128,
+ [BNXT_ULP_CLASS_HID_02ea] = 129,
+ [BNXT_ULP_CLASS_HID_05b8] = 130,
+ [BNXT_ULP_CLASS_HID_0370] = 131,
+ [BNXT_ULP_CLASS_HID_00e0] = 132,
+ [BNXT_ULP_CLASS_HID_0745] = 133,
+ [BNXT_ULP_CLASS_HID_0213] = 134,
+ [BNXT_ULP_CLASS_HID_031b] = 135,
+ [BNXT_ULP_CLASS_HID_008b] = 136,
+ [BNXT_ULP_CLASS_HID_044d] = 137,
+ [BNXT_ULP_CLASS_HID_071b] = 138,
+ [BNXT_ULP_CLASS_HID_0003] = 139,
+ [BNXT_ULP_CLASS_HID_05b3] = 140,
+ [BNXT_ULP_CLASS_HID_05e3] = 141,
+ [BNXT_ULP_CLASS_HID_00b1] = 142,
+ [BNXT_ULP_CLASS_HID_0649] = 143,
+ [BNXT_ULP_CLASS_HID_03f9] = 144,
+ [BNXT_ULP_CLASS_HID_02eb] = 145,
+ [BNXT_ULP_CLASS_HID_05b9] = 146,
+ [BNXT_ULP_CLASS_HID_0371] = 147,
+ [BNXT_ULP_CLASS_HID_00e1] = 148,
+ [BNXT_ULP_CLASS_HID_048b] = 149,
+ [BNXT_ULP_CLASS_HID_0749] = 150,
+ [BNXT_ULP_CLASS_HID_05f1] = 151,
+ [BNXT_ULP_CLASS_HID_04b7] = 152,
+ [BNXT_ULP_CLASS_HID_049b] = 153,
+ [BNXT_ULP_CLASS_HID_0759] = 154,
+ [BNXT_ULP_CLASS_HID_05e1] = 155,
+ [BNXT_ULP_CLASS_HID_04a7] = 156,
+ [BNXT_ULP_CLASS_HID_0301] = 157,
+ [BNXT_ULP_CLASS_HID_07f9] = 158,
+ [BNXT_ULP_CLASS_HID_0397] = 159,
+ [BNXT_ULP_CLASS_HID_068f] = 160,
+ [BNXT_ULP_CLASS_HID_02f1] = 161,
+ [BNXT_ULP_CLASS_HID_0609] = 162,
+ [BNXT_ULP_CLASS_HID_0267] = 163,
+ [BNXT_ULP_CLASS_HID_077f] = 164,
+ [BNXT_ULP_CLASS_HID_01e1] = 165,
+ [BNXT_ULP_CLASS_HID_0329] = 166,
+ [BNXT_ULP_CLASS_HID_01c1] = 167,
+ [BNXT_ULP_CLASS_HID_0309] = 168,
+ [BNXT_ULP_CLASS_HID_01d1] = 169,
+ [BNXT_ULP_CLASS_HID_0319] = 170,
+ [BNXT_ULP_CLASS_HID_01e2] = 171,
+ [BNXT_ULP_CLASS_HID_032a] = 172,
+ [BNXT_ULP_CLASS_HID_0650] = 173,
+ [BNXT_ULP_CLASS_HID_0198] = 174,
+ [BNXT_ULP_CLASS_HID_01c2] = 175,
+ [BNXT_ULP_CLASS_HID_030a] = 176,
+ [BNXT_ULP_CLASS_HID_0670] = 177,
+ [BNXT_ULP_CLASS_HID_01b8] = 178,
+ [BNXT_ULP_CLASS_HID_01d2] = 179,
+ [BNXT_ULP_CLASS_HID_031a] = 180,
+ [BNXT_ULP_CLASS_HID_0660] = 181,
+ [BNXT_ULP_CLASS_HID_01a8] = 182,
+ [BNXT_ULP_CLASS_HID_01dd] = 183,
+ [BNXT_ULP_CLASS_HID_0315] = 184,
+ [BNXT_ULP_CLASS_HID_003d] = 185,
+ [BNXT_ULP_CLASS_HID_02f5] = 186,
+ [BNXT_ULP_CLASS_HID_01cd] = 187,
+ [BNXT_ULP_CLASS_HID_0305] = 188,
+ [BNXT_ULP_CLASS_HID_01de] = 189,
+ [BNXT_ULP_CLASS_HID_0316] = 190,
+ [BNXT_ULP_CLASS_HID_066c] = 191,
+ [BNXT_ULP_CLASS_HID_01a4] = 192,
+ [BNXT_ULP_CLASS_HID_003e] = 193,
+ [BNXT_ULP_CLASS_HID_02f6] = 194,
+ [BNXT_ULP_CLASS_HID_078c] = 195,
+ [BNXT_ULP_CLASS_HID_0044] = 196,
+ [BNXT_ULP_CLASS_HID_01ce] = 197,
+ [BNXT_ULP_CLASS_HID_0306] = 198,
+ [BNXT_ULP_CLASS_HID_067c] = 199,
+ [BNXT_ULP_CLASS_HID_01b4] = 200
};
struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
.wc_pri = 1
},
[3] = {
- .class_hid = BNXT_ULP_CLASS_HID_0134,
+ .class_hid = BNXT_ULP_CLASS_HID_0139,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 2
},
[4] = {
- .class_hid = BNXT_ULP_CLASS_HID_03fc,
+ .class_hid = BNXT_ULP_CLASS_HID_03f1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 3
},
[5] = {
- .class_hid = BNXT_ULP_CLASS_HID_0139,
+ .class_hid = BNXT_ULP_CLASS_HID_068b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 4
},
[6] = {
- .class_hid = BNXT_ULP_CLASS_HID_03f1,
+ .class_hid = BNXT_ULP_CLASS_HID_0143,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 5
},
[7] = {
- .class_hid = BNXT_ULP_CLASS_HID_068b,
+ .class_hid = BNXT_ULP_CLASS_HID_0118,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 6
},
[8] = {
- .class_hid = BNXT_ULP_CLASS_HID_0143,
+ .class_hid = BNXT_ULP_CLASS_HID_03d0,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 7
},
[9] = {
- .class_hid = BNXT_ULP_CLASS_HID_0135,
+ .class_hid = BNXT_ULP_CLASS_HID_0119,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 8
},
[10] = {
- .class_hid = BNXT_ULP_CLASS_HID_03fd,
+ .class_hid = BNXT_ULP_CLASS_HID_03d1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 9
},
[11] = {
- .class_hid = BNXT_ULP_CLASS_HID_0687,
+ .class_hid = BNXT_ULP_CLASS_HID_06ab,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 10
},
[12] = {
- .class_hid = BNXT_ULP_CLASS_HID_014f,
+ .class_hid = BNXT_ULP_CLASS_HID_0163,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 11
},
[13] = {
- .class_hid = BNXT_ULP_CLASS_HID_0118,
+ .class_hid = BNXT_ULP_CLASS_HID_0128,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 12
},
[14] = {
- .class_hid = BNXT_ULP_CLASS_HID_03d0,
+ .class_hid = BNXT_ULP_CLASS_HID_03e0,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 13
},
[15] = {
- .class_hid = BNXT_ULP_CLASS_HID_0114,
+ .class_hid = BNXT_ULP_CLASS_HID_0129,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 14
},
[16] = {
- .class_hid = BNXT_ULP_CLASS_HID_03dc,
+ .class_hid = BNXT_ULP_CLASS_HID_03e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
.wc_pri = 15
},
[17] = {
- .class_hid = BNXT_ULP_CLASS_HID_0119,
+ .class_hid = BNXT_ULP_CLASS_HID_069b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 16
},
[18] = {
- .class_hid = BNXT_ULP_CLASS_HID_03d1,
+ .class_hid = BNXT_ULP_CLASS_HID_0153,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 6,
.wc_pri = 17
},
[19] = {
- .class_hid = BNXT_ULP_CLASS_HID_06ab,
+ .class_hid = BNXT_ULP_CLASS_HID_0134,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 18
+ .class_tid = 7,
+ .wc_pri = 0
},
[20] = {
- .class_hid = BNXT_ULP_CLASS_HID_0163,
+ .class_hid = BNXT_ULP_CLASS_HID_03fc,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 19
+ .class_tid = 7,
+ .wc_pri = 1
},
[21] = {
- .class_hid = BNXT_ULP_CLASS_HID_0115,
+ .class_hid = BNXT_ULP_CLASS_HID_0135,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 20
+ .class_tid = 7,
+ .wc_pri = 2
},
[22] = {
- .class_hid = BNXT_ULP_CLASS_HID_03dd,
+ .class_hid = BNXT_ULP_CLASS_HID_03fd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 21
+ .class_tid = 7,
+ .wc_pri = 3
},
[23] = {
- .class_hid = BNXT_ULP_CLASS_HID_06a7,
+ .class_hid = BNXT_ULP_CLASS_HID_0687,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 22
+ .class_tid = 7,
+ .wc_pri = 4
},
[24] = {
- .class_hid = BNXT_ULP_CLASS_HID_016f,
+ .class_hid = BNXT_ULP_CLASS_HID_014f,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 23
+ .class_tid = 7,
+ .wc_pri = 5
},
[25] = {
- .class_hid = BNXT_ULP_CLASS_HID_0128,
+ .class_hid = BNXT_ULP_CLASS_HID_0114,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 24
+ .class_tid = 7,
+ .wc_pri = 6
},
[26] = {
- .class_hid = BNXT_ULP_CLASS_HID_03e0,
+ .class_hid = BNXT_ULP_CLASS_HID_03dc,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 25
+ .class_tid = 7,
+ .wc_pri = 7
},
[27] = {
- .class_hid = BNXT_ULP_CLASS_HID_0124,
+ .class_hid = BNXT_ULP_CLASS_HID_0115,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 26
+ .class_tid = 7,
+ .wc_pri = 8
},
[28] = {
- .class_hid = BNXT_ULP_CLASS_HID_03ec,
+ .class_hid = BNXT_ULP_CLASS_HID_03dd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 27
+ .class_tid = 7,
+ .wc_pri = 9
},
[29] = {
- .class_hid = BNXT_ULP_CLASS_HID_0129,
+ .class_hid = BNXT_ULP_CLASS_HID_06a7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 28
+ .class_tid = 7,
+ .wc_pri = 10
},
[30] = {
- .class_hid = BNXT_ULP_CLASS_HID_03e1,
+ .class_hid = BNXT_ULP_CLASS_HID_016f,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 29
+ .class_tid = 7,
+ .wc_pri = 11
},
[31] = {
- .class_hid = BNXT_ULP_CLASS_HID_069b,
+ .class_hid = BNXT_ULP_CLASS_HID_0124,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 30
+ .class_tid = 7,
+ .wc_pri = 12
},
[32] = {
- .class_hid = BNXT_ULP_CLASS_HID_0153,
+ .class_hid = BNXT_ULP_CLASS_HID_03ec,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 31
+ .class_tid = 7,
+ .wc_pri = 13
},
[33] = {
.class_hid = BNXT_ULP_CLASS_HID_0125,
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 32
+ .class_tid = 7,
+ .wc_pri = 14
},
[34] = {
.class_hid = BNXT_ULP_CLASS_HID_03ed,
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 33
+ .class_tid = 7,
+ .wc_pri = 15
},
[35] = {
.class_hid = BNXT_ULP_CLASS_HID_0697,
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 34
+ .class_tid = 7,
+ .wc_pri = 16
},
[36] = {
.class_hid = BNXT_ULP_CLASS_HID_015f,
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF6_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF7_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF7_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 6,
- .wc_pri = 35
+ .class_tid = 7,
+ .wc_pri = 17
},
[37] = {
.class_hid = BNXT_ULP_CLASS_HID_0452,
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 7,
+ .class_tid = 8,
.wc_pri = 0
},
[38] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 7,
+ .class_tid = 8,
.wc_pri = 1
},
[39] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 7,
+ .class_tid = 8,
.wc_pri = 2
},
[40] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 7,
+ .class_tid = 8,
.wc_pri = 3
},
[41] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 8,
+ .class_tid = 9,
.wc_pri = 0
},
[42] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 8,
+ .class_tid = 9,
.wc_pri = 1
},
[43] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF8_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 8,
+ .class_tid = 9,
.wc_pri = 2
},
[44] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF8_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF8_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 8,
+ .class_tid = 9,
.wc_pri = 3
},
[45] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 9,
+ .class_tid = 10,
.wc_pri = 0
},
[46] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF9_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 9,
+ .class_tid = 10,
.wc_pri = 1
},
[47] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF9_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 9,
+ .class_tid = 10,
.wc_pri = 2
},
[48] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF9_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF9_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF9_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF9_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 9,
+ .class_tid = 10,
.wc_pri = 3
},
[49] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 10,
+ .class_tid = 11,
.wc_pri = 0
},
[50] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF10_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 10,
+ .class_tid = 11,
.wc_pri = 1
},
[51] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 10,
+ .class_tid = 11,
.wc_pri = 2
},
[52] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF10_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF10_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 10,
+ .class_tid = 11,
.wc_pri = 3
},
[53] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 0
},
[54] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 1
},
[55] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 2
},
[56] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 3
},
[57] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 4
},
[58] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 5
},
[59] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 6
},
[60] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 7
},
[61] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 8
},
[62] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 9
},
[63] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 10
},
[64] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF11_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF11_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF11_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF11_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF11_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 11,
+ .class_tid = 12,
.wc_pri = 11
},
[65] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 0
},
[66] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 1
},
[67] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 2
},
[68] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 3
},
[69] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 4
},
[70] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 5
},
[71] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 6
},
[72] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 7
},
[73] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 8
},
[74] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 9
},
[75] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 10
},
[76] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF12_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF12_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF12_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 12,
+ .class_tid = 13,
.wc_pri = 11
},
[77] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 0
},
[78] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 1
},
[79] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 2
},
[80] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 3
},
[81] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 4
},
[82] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 5
},
[83] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 6
},
[84] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 7
},
[85] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 8
},
[86] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 9
},
[87] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 10
},
[88] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF13_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF13_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF13_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF13_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF13_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 13,
+ .class_tid = 14,
.wc_pri = 11
},
[89] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 0
},
[90] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 1
},
[91] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 2
},
[92] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 3
},
[93] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 4
},
[94] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 5
},
[95] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 6
},
[96] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 7
},
[97] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 8
},
[98] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 9
},
[99] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
+ .class_tid = 15,
.wc_pri = 10
},
[100] = {
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF14_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF14_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF14_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 14,
- .wc_pri = 11
- },
- [101] = {
- .class_hid = BNXT_ULP_CLASS_HID_0768,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_HDR_BIT_T_VXLAN |
- BNXT_ULP_HDR_BIT_I_ETH |
- BNXT_ULP_HDR_BIT_I_IPV4 |
- BNXT_ULP_HDR_BIT_I_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF15_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF15_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF15_BITMASK_I_ETH_TYPE |
- BNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR |
- BNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID |
- BNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT |
- BNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 15,
- .wc_pri = 0
- },
- [102] = {
- .class_hid = BNXT_ULP_CLASS_HID_073c,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_HDR_BIT_T_VXLAN |
- BNXT_ULP_HDR_BIT_I_ETH |
- BNXT_ULP_HDR_BIT_I_IPV4 |
- BNXT_ULP_HDR_BIT_I_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF15_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF15_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF15_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF15_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF15_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF15_BITMASK_I_IPV4_DST_ADDR |
- BNXT_ULP_HF15_BITMASK_I_IPV4_PROTO_ID |
- BNXT_ULP_HF15_BITMASK_I_UDP_SRC_PORT |
- BNXT_ULP_HF15_BITMASK_I_UDP_DST_PORT |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 15,
- .wc_pri = 1
+ .wc_pri = 11
},
- [103] = {
+ [101] = {
.class_hid = BNXT_ULP_CLASS_HID_04bc,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 0
},
- [104] = {
+ [102] = {
.class_hid = BNXT_ULP_CLASS_HID_0442,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 1
},
- [105] = {
+ [103] = {
.class_hid = BNXT_ULP_CLASS_HID_050a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 2
},
- [106] = {
+ [104] = {
.class_hid = BNXT_ULP_CLASS_HID_06ba,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 3
},
- [107] = {
+ [105] = {
.class_hid = BNXT_ULP_CLASS_HID_0472,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 4
},
- [108] = {
+ [106] = {
.class_hid = BNXT_ULP_CLASS_HID_0700,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 5
},
- [109] = {
+ [107] = {
.class_hid = BNXT_ULP_CLASS_HID_04c8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 6
},
- [110] = {
+ [108] = {
.class_hid = BNXT_ULP_CLASS_HID_0678,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 7
},
- [111] = {
- .class_hid = BNXT_ULP_CLASS_HID_064f,
+ [109] = {
+ .class_hid = BNXT_ULP_CLASS_HID_061f,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
.class_tid = 16,
.wc_pri = 8
},
- [112] = {
- .class_hid = BNXT_ULP_CLASS_HID_051d,
+ [110] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05ad,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
.class_tid = 16,
.wc_pri = 9
},
- [113] = {
+ [111] = {
.class_hid = BNXT_ULP_CLASS_HID_06a5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 10
},
- [114] = {
+ [112] = {
.class_hid = BNXT_ULP_CLASS_HID_0455,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 11
},
- [115] = {
- .class_hid = BNXT_ULP_CLASS_HID_04bd,
+ [113] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05dd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 12
},
- [116] = {
- .class_hid = BNXT_ULP_CLASS_HID_0443,
+ [114] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0563,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 13
},
- [117] = {
- .class_hid = BNXT_ULP_CLASS_HID_050b,
+ [115] = {
+ .class_hid = BNXT_ULP_CLASS_HID_059b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 14
},
- [118] = {
- .class_hid = BNXT_ULP_CLASS_HID_06bb,
+ [116] = {
+ .class_hid = BNXT_ULP_CLASS_HID_070b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 15
},
- [119] = {
- .class_hid = BNXT_ULP_CLASS_HID_050d,
+ [117] = {
+ .class_hid = BNXT_ULP_CLASS_HID_04bd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 16
},
- [120] = {
- .class_hid = BNXT_ULP_CLASS_HID_04d3,
+ [118] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0443,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 17
},
- [121] = {
- .class_hid = BNXT_ULP_CLASS_HID_059b,
+ [119] = {
+ .class_hid = BNXT_ULP_CLASS_HID_050b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF16_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 18
},
- [122] = {
- .class_hid = BNXT_ULP_CLASS_HID_070b,
+ [120] = {
+ .class_hid = BNXT_ULP_CLASS_HID_06bb,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF16_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF16_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 16,
.wc_pri = 19
},
- [123] = {
+ [121] = {
.class_hid = BNXT_ULP_CLASS_HID_0473,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 20
},
- [124] = {
+ [122] = {
.class_hid = BNXT_ULP_CLASS_HID_0701,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 21
},
- [125] = {
+ [123] = {
.class_hid = BNXT_ULP_CLASS_HID_04c9,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 22
},
- [126] = {
+ [124] = {
.class_hid = BNXT_ULP_CLASS_HID_0679,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
.class_tid = 16,
.wc_pri = 23
},
- [127] = {
- .class_hid = BNXT_ULP_CLASS_HID_048b,
+ [125] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05e2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 17,
.wc_pri = 0
},
- [128] = {
- .class_hid = BNXT_ULP_CLASS_HID_0749,
+ [126] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00b0,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 17,
.wc_pri = 1
},
- [129] = {
- .class_hid = BNXT_ULP_CLASS_HID_05f1,
+ [127] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0648,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 17,
.wc_pri = 2
},
- [130] = {
- .class_hid = BNXT_ULP_CLASS_HID_04b7,
+ [128] = {
+ .class_hid = BNXT_ULP_CLASS_HID_03f8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF17_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF17_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 17,
.wc_pri = 3
},
+ [129] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02ea,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 17,
+ .wc_pri = 4
+ },
+ [130] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05b8,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 17,
+ .wc_pri = 5
+ },
[131] = {
- .class_hid = BNXT_ULP_CLASS_HID_049b,
+ .class_hid = BNXT_ULP_CLASS_HID_0370,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 18,
- .wc_pri = 0
+ .class_tid = 17,
+ .wc_pri = 6
},
[132] = {
- .class_hid = BNXT_ULP_CLASS_HID_0759,
+ .class_hid = BNXT_ULP_CLASS_HID_00e0,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 18,
- .wc_pri = 1
+ .class_tid = 17,
+ .wc_pri = 7
},
[133] = {
- .class_hid = BNXT_ULP_CLASS_HID_05e1,
+ .class_hid = BNXT_ULP_CLASS_HID_0745,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 18,
- .wc_pri = 2
+ .class_tid = 17,
+ .wc_pri = 8
},
[134] = {
- .class_hid = BNXT_ULP_CLASS_HID_04a7,
+ .class_hid = BNXT_ULP_CLASS_HID_0213,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF18_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 18,
- .wc_pri = 3
+ .class_tid = 17,
+ .wc_pri = 9
},
[135] = {
- .class_hid = BNXT_ULP_CLASS_HID_0301,
+ .class_hid = BNXT_ULP_CLASS_HID_031b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 19,
- .wc_pri = 0
+ .class_tid = 17,
+ .wc_pri = 10
},
[136] = {
- .class_hid = BNXT_ULP_CLASS_HID_07f9,
+ .class_hid = BNXT_ULP_CLASS_HID_008b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 19,
- .wc_pri = 1
+ .class_tid = 17,
+ .wc_pri = 11
},
[137] = {
- .class_hid = BNXT_ULP_CLASS_HID_0397,
+ .class_hid = BNXT_ULP_CLASS_HID_044d,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 19,
- .wc_pri = 2
+ .class_tid = 17,
+ .wc_pri = 12
},
[138] = {
- .class_hid = BNXT_ULP_CLASS_HID_068f,
+ .class_hid = BNXT_ULP_CLASS_HID_071b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 19,
- .wc_pri = 3
+ .class_tid = 17,
+ .wc_pri = 13
},
[139] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f1,
+ .class_hid = BNXT_ULP_CLASS_HID_0003,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 20,
- .wc_pri = 0
+ .class_tid = 17,
+ .wc_pri = 14
},
[140] = {
- .class_hid = BNXT_ULP_CLASS_HID_0609,
+ .class_hid = BNXT_ULP_CLASS_HID_05b3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 20,
- .wc_pri = 1
+ .class_tid = 17,
+ .wc_pri = 15
},
[141] = {
- .class_hid = BNXT_ULP_CLASS_HID_0267,
+ .class_hid = BNXT_ULP_CLASS_HID_05e3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 20,
- .wc_pri = 2
+ .class_tid = 17,
+ .wc_pri = 16
},
[142] = {
- .class_hid = BNXT_ULP_CLASS_HID_077f,
+ .class_hid = BNXT_ULP_CLASS_HID_00b1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF20_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 20,
- .wc_pri = 3
+ .class_tid = 17,
+ .wc_pri = 17
},
[143] = {
- .class_hid = BNXT_ULP_CLASS_HID_01e1,
+ .class_hid = BNXT_ULP_CLASS_HID_0649,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 0
+ .class_tid = 17,
+ .wc_pri = 18
},
[144] = {
- .class_hid = BNXT_ULP_CLASS_HID_0329,
+ .class_hid = BNXT_ULP_CLASS_HID_03f9,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 1
+ .class_tid = 17,
+ .wc_pri = 19
},
[145] = {
- .class_hid = BNXT_ULP_CLASS_HID_01dd,
+ .class_hid = BNXT_ULP_CLASS_HID_02eb,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 2
+ .class_tid = 17,
+ .wc_pri = 20
},
[146] = {
- .class_hid = BNXT_ULP_CLASS_HID_0315,
+ .class_hid = BNXT_ULP_CLASS_HID_05b9,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 3
+ .class_tid = 17,
+ .wc_pri = 21
},
[147] = {
- .class_hid = BNXT_ULP_CLASS_HID_01c1,
+ .class_hid = BNXT_ULP_CLASS_HID_0371,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 4
+ .class_tid = 17,
+ .wc_pri = 22
},
[148] = {
- .class_hid = BNXT_ULP_CLASS_HID_0309,
+ .class_hid = BNXT_ULP_CLASS_HID_00e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 5
+ .class_tid = 17,
+ .wc_pri = 23
},
[149] = {
- .class_hid = BNXT_ULP_CLASS_HID_003d,
+ .class_hid = BNXT_ULP_CLASS_HID_048b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 6
+ .class_tid = 18,
+ .wc_pri = 0
},
[150] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f5,
+ .class_hid = BNXT_ULP_CLASS_HID_0749,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 7
+ .class_tid = 18,
+ .wc_pri = 1
},
[151] = {
- .class_hid = BNXT_ULP_CLASS_HID_01d1,
+ .class_hid = BNXT_ULP_CLASS_HID_05f1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 8
+ .class_tid = 18,
+ .wc_pri = 2
},
[152] = {
- .class_hid = BNXT_ULP_CLASS_HID_0319,
+ .class_hid = BNXT_ULP_CLASS_HID_04b7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 9
+ .class_tid = 18,
+ .wc_pri = 3
},
[153] = {
- .class_hid = BNXT_ULP_CLASS_HID_01cd,
+ .class_hid = BNXT_ULP_CLASS_HID_049b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 10
+ .class_tid = 19,
+ .wc_pri = 0
},
[154] = {
- .class_hid = BNXT_ULP_CLASS_HID_0305,
+ .class_hid = BNXT_ULP_CLASS_HID_0759,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 11
+ .class_tid = 19,
+ .wc_pri = 1
},
[155] = {
- .class_hid = BNXT_ULP_CLASS_HID_01e2,
+ .class_hid = BNXT_ULP_CLASS_HID_05e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 12
+ .class_tid = 19,
+ .wc_pri = 2
},
[156] = {
- .class_hid = BNXT_ULP_CLASS_HID_032a,
+ .class_hid = BNXT_ULP_CLASS_HID_04a7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 13
+ .class_tid = 19,
+ .wc_pri = 3
},
[157] = {
- .class_hid = BNXT_ULP_CLASS_HID_0650,
+ .class_hid = BNXT_ULP_CLASS_HID_0301,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 14
+ .class_tid = 20,
+ .wc_pri = 0
},
[158] = {
- .class_hid = BNXT_ULP_CLASS_HID_0198,
+ .class_hid = BNXT_ULP_CLASS_HID_07f9,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 15
+ .class_tid = 20,
+ .wc_pri = 1
},
[159] = {
- .class_hid = BNXT_ULP_CLASS_HID_01de,
+ .class_hid = BNXT_ULP_CLASS_HID_0397,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 16
+ .class_tid = 20,
+ .wc_pri = 2
},
[160] = {
- .class_hid = BNXT_ULP_CLASS_HID_0316,
+ .class_hid = BNXT_ULP_CLASS_HID_068f,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 17
+ .class_tid = 20,
+ .wc_pri = 3
},
[161] = {
- .class_hid = BNXT_ULP_CLASS_HID_066c,
+ .class_hid = BNXT_ULP_CLASS_HID_02f1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
- .wc_pri = 18
+ .wc_pri = 0
},
[162] = {
- .class_hid = BNXT_ULP_CLASS_HID_01a4,
+ .class_hid = BNXT_ULP_CLASS_HID_0609,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
- .wc_pri = 19
+ .wc_pri = 1
},
[163] = {
- .class_hid = BNXT_ULP_CLASS_HID_01c2,
+ .class_hid = BNXT_ULP_CLASS_HID_0267,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
- .wc_pri = 20
+ .wc_pri = 2
},
[164] = {
- .class_hid = BNXT_ULP_CLASS_HID_030a,
+ .class_hid = BNXT_ULP_CLASS_HID_077f,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
- .wc_pri = 21
+ .wc_pri = 3
},
[165] = {
- .class_hid = BNXT_ULP_CLASS_HID_0670,
+ .class_hid = BNXT_ULP_CLASS_HID_01e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 22
+ .class_tid = 22,
+ .wc_pri = 0
},
[166] = {
- .class_hid = BNXT_ULP_CLASS_HID_01b8,
+ .class_hid = BNXT_ULP_CLASS_HID_0329,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 23
+ .class_tid = 22,
+ .wc_pri = 1
},
[167] = {
- .class_hid = BNXT_ULP_CLASS_HID_003e,
+ .class_hid = BNXT_ULP_CLASS_HID_01c1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 24
+ .class_tid = 22,
+ .wc_pri = 2
},
[168] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f6,
+ .class_hid = BNXT_ULP_CLASS_HID_0309,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 25
+ .class_tid = 22,
+ .wc_pri = 3
},
[169] = {
- .class_hid = BNXT_ULP_CLASS_HID_078c,
+ .class_hid = BNXT_ULP_CLASS_HID_01d1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 26
+ .class_tid = 22,
+ .wc_pri = 4
},
[170] = {
- .class_hid = BNXT_ULP_CLASS_HID_0044,
+ .class_hid = BNXT_ULP_CLASS_HID_0319,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 27
+ .class_tid = 22,
+ .wc_pri = 5
},
[171] = {
- .class_hid = BNXT_ULP_CLASS_HID_01d2,
+ .class_hid = BNXT_ULP_CLASS_HID_01e2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 28
+ .class_tid = 22,
+ .wc_pri = 6
},
[172] = {
- .class_hid = BNXT_ULP_CLASS_HID_031a,
+ .class_hid = BNXT_ULP_CLASS_HID_032a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 29
+ .class_tid = 22,
+ .wc_pri = 7
},
[173] = {
- .class_hid = BNXT_ULP_CLASS_HID_0660,
+ .class_hid = BNXT_ULP_CLASS_HID_0650,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 30
+ .class_tid = 22,
+ .wc_pri = 8
},
[174] = {
- .class_hid = BNXT_ULP_CLASS_HID_01a8,
+ .class_hid = BNXT_ULP_CLASS_HID_0198,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 31
+ .class_tid = 22,
+ .wc_pri = 9
},
[175] = {
- .class_hid = BNXT_ULP_CLASS_HID_01ce,
+ .class_hid = BNXT_ULP_CLASS_HID_01c2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 32
+ .class_tid = 22,
+ .wc_pri = 10
},
[176] = {
- .class_hid = BNXT_ULP_CLASS_HID_0306,
+ .class_hid = BNXT_ULP_CLASS_HID_030a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 33
+ .class_tid = 22,
+ .wc_pri = 11
},
[177] = {
- .class_hid = BNXT_ULP_CLASS_HID_067c,
+ .class_hid = BNXT_ULP_CLASS_HID_0670,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 34
+ .class_tid = 22,
+ .wc_pri = 12
},
[178] = {
- .class_hid = BNXT_ULP_CLASS_HID_01b4,
+ .class_hid = BNXT_ULP_CLASS_HID_01b8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF21_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF21_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 21,
- .wc_pri = 35
- }
-};
-
-struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
- [((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 0,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ .class_tid = 22,
+ .wc_pri = 13
},
- [((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 6,
- .start_tbl_idx = 5,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ [179] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01d2,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 14
},
- [((3 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 7,
- .start_tbl_idx = 11,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ [180] = {
+ .class_hid = BNXT_ULP_CLASS_HID_031a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 15
},
- [((4 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 6,
- .start_tbl_idx = 18,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ [181] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0660,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 16
},
- [((5 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 1,
- .start_tbl_idx = 24,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ [182] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01a8,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 17
},
- [((6 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 4,
- .start_tbl_idx = 25,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ [183] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01dd,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 0
},
- [((7 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 29,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ [184] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0315,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 1
},
- [((8 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 34,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ [185] = {
+ .class_hid = BNXT_ULP_CLASS_HID_003d,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 2
},
- [((9 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 39,
- .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ [186] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02f5,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 3
},
- [((10 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
- BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
- .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ [187] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01cd,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 4
+ },
+ [188] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0305,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 5
+ },
+ [189] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01de,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 6
+ },
+ [190] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0316,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 7
+ },
+ [191] = {
+ .class_hid = BNXT_ULP_CLASS_HID_066c,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 8
+ },
+ [192] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01a4,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 9
+ },
+ [193] = {
+ .class_hid = BNXT_ULP_CLASS_HID_003e,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 10
+ },
+ [194] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02f6,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 11
+ },
+ [195] = {
+ .class_hid = BNXT_ULP_CLASS_HID_078c,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 12
+ },
+ [196] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0044,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 13
+ },
+ [197] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01ce,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 14
+ },
+ [198] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0306,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 15
+ },
+ [199] = {
+ .class_hid = BNXT_ULP_CLASS_HID_067c,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 16
+ },
+ [200] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01b4,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 17
+ }
+};
+
+struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {
+ [((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 6,
+ .start_tbl_idx = 0,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ },
+ [((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 7,
+ .start_tbl_idx = 6,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ },
+ [((3 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 7,
+ .start_tbl_idx = 13,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ },
+ [((4 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 7,
+ .start_tbl_idx = 20,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ },
+ [((5 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 1,
+ .start_tbl_idx = 27,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_DEFAULT
+ },
+ [((6 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 4,
+ .start_tbl_idx = 28,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((7 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 4,
+ .start_tbl_idx = 32,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((8 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 5,
+ .start_tbl_idx = 36,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((9 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 5,
+ .start_tbl_idx = 41,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((10 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 5,
- .start_tbl_idx = 44,
+ .start_tbl_idx = 46,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((11 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 4,
- .start_tbl_idx = 49,
+ .num_tbls = 5,
+ .start_tbl_idx = 51,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((12 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 53,
+ .start_tbl_idx = 56,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((13 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 57,
+ .start_tbl_idx = 60,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((14 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 61,
+ .start_tbl_idx = 64,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((15 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 65,
+ .start_tbl_idx = 68,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((16 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 69,
+ .start_tbl_idx = 72,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((17 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 73,
+ .num_tbls = 4,
+ .start_tbl_idx = 76,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((18 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 5,
- .start_tbl_idx = 78,
+ .start_tbl_idx = 80,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((19 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 5,
- .start_tbl_idx = 83,
+ .start_tbl_idx = 85,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((20 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 5,
- .start_tbl_idx = 88,
+ .start_tbl_idx = 90,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
},
[((21 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 5,
+ .start_tbl_idx = 95,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((22 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 4,
+ .start_tbl_idx = 100,
+ .flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
+ },
+ [((23 << BNXT_ULP_LOG2_MAX_NUM_DEV) |
+ BNXT_ULP_DEVICE_ID_WH_PLUS)] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 4,
- .start_tbl_idx = 93,
+ .start_tbl_idx = 104,
.flow_db_table_type = BNXT_ULP_FDB_TYPE_REGULAR
}
};
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
- .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
+ .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
.direction = TF_DIR_RX,
.result_start_idx = 40,
.result_bit_size = 32,
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
- .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
+ .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
.direction = TF_DIR_RX,
.result_start_idx = 41,
.result_bit_size = 32,
.index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF
},
{
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
+ .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
+ .direction = TF_DIR_RX,
+ .result_start_idx = 42,
+ .result_bit_size = 32,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD,
+ .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF
+ },
+ {
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
- .result_start_idx = 42,
+ .result_start_idx = 43,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 68,
+ .result_start_idx = 69,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 81,
+ .result_start_idx = 82,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 82,
+ .result_start_idx = 83,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
+ .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
+ .direction = TF_DIR_TX,
+ .result_start_idx = 96,
+ .result_bit_size = 32,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD,
+ .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
.direction = TF_DIR_TX,
- .result_start_idx = 95,
+ .result_start_idx = 97,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
.resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
.direction = TF_DIR_TX,
- .result_start_idx = 96,
+ .result_start_idx = 98,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
- .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
+ .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_TX,
- .result_start_idx = 97,
+ .result_start_idx = 99,
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
- .result_start_idx = 109,
+ .result_start_idx = 111,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 135,
+ .result_start_idx = 137,
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 135,
+ .result_start_idx = 137,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
- .result_start_idx = 148,
+ .result_start_idx = 150,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 174,
+ .result_start_idx = 176,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 187,
+ .result_start_idx = 189,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 200,
+ .result_start_idx = 202,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 201,
+ .result_start_idx = 203,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
- .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
+ .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,
.direction = TF_DIR_TX,
- .result_start_idx = 214,
+ .result_start_idx = 216,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
- .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
+ .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR,
+ .direction = TF_DIR_TX,
+ .result_start_idx = 217,
+ .result_bit_size = 32,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT,
+ .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE,
+ .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,
.direction = TF_DIR_TX,
- .result_start_idx = 215,
+ .result_start_idx = 218,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
- .result_start_idx = 216,
+ .result_start_idx = 219,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 242,
+ .result_start_idx = 245,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
- .result_start_idx = 255,
+ .result_start_idx = 258,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 281,
+ .result_start_idx = 284,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 294,
+ .result_start_idx = 297,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.key_start_idx = 124,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 295,
+ .key_num_fields = 43,
+ .result_start_idx = 298,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 166,
+ .key_start_idx = 167,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 303,
+ .result_start_idx = 306,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
- .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
- .resource_sub_type =
- BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
- .direction = TF_DIR_RX,
- .key_start_idx = 177,
- .blob_key_bit_size = 8,
- .key_bit_size = 8,
- .key_num_fields = 1,
- .result_start_idx = 312,
- .result_bit_size = 10,
- .result_num_fields = 1,
- .encap_num_fields = 0,
- .ident_start_idx = 5,
- .ident_nums = 1
- },
- {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
- .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
.key_start_idx = 178,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 313,
+ .result_start_idx = 315,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 6,
- .ident_nums = 0,
+ .ident_start_idx = 5,
+ .ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 326,
+ .result_start_idx = 328,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.key_start_idx = 194,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 327,
+ .key_num_fields = 43,
+ .result_start_idx = 329,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 236,
+ .key_start_idx = 237,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 335,
+ .result_start_idx = 337,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 247,
+ .key_start_idx = 248,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 344,
+ .result_start_idx = 346,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 248,
+ .key_start_idx = 249,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 345,
+ .result_start_idx = 347,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 261,
+ .key_start_idx = 262,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 358,
+ .result_start_idx = 360,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 264,
+ .key_start_idx = 265,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 359,
+ .key_num_fields = 43,
+ .result_start_idx = 361,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 306,
+ .key_start_idx = 308,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 367,
+ .result_start_idx = 369,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 317,
+ .key_start_idx = 319,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 376,
+ .result_start_idx = 378,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 318,
+ .key_start_idx = 320,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 377,
+ .result_start_idx = 379,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 331,
+ .key_start_idx = 333,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 390,
+ .result_start_idx = 392,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 334,
+ .key_start_idx = 336,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 391,
+ .key_num_fields = 43,
+ .result_start_idx = 393,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 376,
- .blob_key_bit_size = 392,
- .key_bit_size = 392,
+ .key_start_idx = 379,
+ .blob_key_bit_size = 200,
+ .key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 399,
+ .result_start_idx = 401,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 387,
+ .key_start_idx = 390,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 408,
+ .result_start_idx = 410,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 388,
+ .key_start_idx = 391,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 409,
+ .result_start_idx = 411,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 401,
+ .key_start_idx = 404,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 422,
+ .result_start_idx = 424,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 404,
+ .key_start_idx = 407,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 423,
+ .key_num_fields = 43,
+ .result_start_idx = 425,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 446,
+ .key_start_idx = 450,
.blob_key_bit_size = 392,
.key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 431,
+ .result_start_idx = 433,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 461,
+ .blob_key_bit_size = 8,
+ .key_bit_size = 8,
+ .key_num_fields = 1,
+ .result_start_idx = 442,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 13,
+ .ident_nums = 1
+ },
+ {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
- .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
- .key_start_idx = 457,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .key_start_idx = 462,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 440,
+ .result_start_idx = 443,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 13,
- .ident_nums = 1,
+ .ident_start_idx = 14,
+ .ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 470,
+ .key_start_idx = 475,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 453,
+ .result_start_idx = 456,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 473,
+ .key_start_idx = 478,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 454,
+ .key_num_fields = 43,
+ .result_start_idx = 457,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 515,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
+ .key_start_idx = 521,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 462,
+ .result_start_idx = 465,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
- .key_start_idx = 526,
+ .key_start_idx = 532,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 471,
+ .result_start_idx = 474,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 539,
+ .key_start_idx = 545,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 484,
+ .result_start_idx = 487,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 542,
+ .key_start_idx = 548,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 485,
+ .key_num_fields = 43,
+ .result_start_idx = 488,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 584,
+ .key_start_idx = 591,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 493,
+ .result_start_idx = 496,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
- .key_start_idx = 595,
+ .key_start_idx = 602,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 502,
+ .result_start_idx = 505,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 608,
+ .key_start_idx = 615,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 515,
+ .result_start_idx = 518,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 611,
+ .key_start_idx = 618,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 516,
+ .key_num_fields = 43,
+ .result_start_idx = 519,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 653,
+ .key_start_idx = 661,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 524,
+ .result_start_idx = 527,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
- .key_start_idx = 664,
+ .key_start_idx = 672,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 533,
+ .result_start_idx = 536,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 677,
+ .key_start_idx = 685,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 546,
+ .result_start_idx = 549,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 680,
+ .key_start_idx = 688,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 547,
+ .key_num_fields = 43,
+ .result_start_idx = 550,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 722,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
+ .key_start_idx = 731,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 555,
+ .result_start_idx = 558,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
- .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 733,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .key_start_idx = 742,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 564,
+ .result_start_idx = 567,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 746,
+ .key_start_idx = 755,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 577,
+ .result_start_idx = 580,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 749,
+ .key_start_idx = 758,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 578,
+ .key_num_fields = 43,
+ .result_start_idx = 581,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 791,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
+ .key_start_idx = 801,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 586,
+ .result_start_idx = 589,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
- .key_start_idx = 802,
+ .key_start_idx = 812,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 595,
+ .result_start_idx = 598,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_RX,
- .key_start_idx = 815,
+ .key_start_idx = 825,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 608,
+ .result_start_idx = 611,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
.direction = TF_DIR_RX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 818,
+ .key_start_idx = 828,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 609,
+ .key_num_fields = 43,
+ .result_start_idx = 612,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
- .key_start_idx = 860,
+ .key_start_idx = 871,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 617,
+ .result_start_idx = 620,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_RX,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .key_start_idx = 882,
+ .blob_key_bit_size = 167,
+ .key_bit_size = 167,
+ .key_num_fields = 13,
+ .result_start_idx = 629,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 25,
+ .ident_nums = 1,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 895,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 642,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 26,
+ .ident_nums = 1
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_RX,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .key_start_idx = 898,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 643,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 27,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+ .resource_type = TF_MEM_INTERNAL,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 941,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
+ .key_num_fields = 11,
+ .result_start_idx = 651,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 27,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 871,
+ .key_start_idx = 952,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 626,
+ .result_start_idx = 660,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 25,
+ .ident_start_idx = 27,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 872,
+ .key_start_idx = 953,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 627,
+ .result_start_idx = 661,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 26,
+ .ident_start_idx = 28,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 885,
+ .key_start_idx = 966,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 640,
+ .result_start_idx = 674,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 26,
+ .ident_start_idx = 28,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 888,
+ .key_start_idx = 969,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 641,
+ .key_num_fields = 43,
+ .result_start_idx = 675,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 27,
+ .ident_start_idx = 29,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_TX,
- .key_start_idx = 930,
+ .key_start_idx = 1012,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 649,
+ .result_start_idx = 683,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 27,
+ .ident_start_idx = 29,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 941,
+ .key_start_idx = 1023,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 658,
+ .result_start_idx = 692,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 27,
+ .ident_start_idx = 29,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 942,
+ .key_start_idx = 1024,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 659,
+ .result_start_idx = 693,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 28,
+ .ident_start_idx = 30,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 955,
+ .key_start_idx = 1037,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 672,
+ .result_start_idx = 706,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 28,
+ .ident_start_idx = 30,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 958,
+ .key_start_idx = 1040,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 673,
+ .key_num_fields = 43,
+ .result_start_idx = 707,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 31,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_TX,
- .key_start_idx = 1000,
+ .key_start_idx = 1083,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 681,
+ .result_start_idx = 715,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 31,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1011,
+ .key_start_idx = 1094,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 690,
+ .result_start_idx = 724,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 31,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1012,
+ .key_start_idx = 1095,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 691,
+ .result_start_idx = 725,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 32,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1025,
+ .key_start_idx = 1108,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 704,
+ .result_start_idx = 738,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 32,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1028,
+ .key_start_idx = 1111,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 705,
+ .key_num_fields = 43,
+ .result_start_idx = 739,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 33,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_TX,
- .key_start_idx = 1070,
+ .key_start_idx = 1154,
.blob_key_bit_size = 392,
.key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 713,
+ .result_start_idx = 747,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 33,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1081,
+ .key_start_idx = 1165,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 722,
+ .result_start_idx = 756,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 33,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1082,
+ .key_start_idx = 1166,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 723,
+ .result_start_idx = 757,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 34,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1095,
+ .key_start_idx = 1179,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 736,
+ .result_start_idx = 770,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 34,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1098,
+ .key_start_idx = 1182,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 737,
+ .key_num_fields = 43,
+ .result_start_idx = 771,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_TX,
- .key_start_idx = 1140,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
+ .key_start_idx = 1225,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 745,
+ .result_start_idx = 779,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
- .key_start_idx = 1151,
+ .key_start_idx = 1236,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 754,
+ .result_start_idx = 788,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 35,
.ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1164,
+ .key_start_idx = 1249,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 767,
+ .result_start_idx = 801,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 34,
+ .ident_start_idx = 36,
.ident_nums = 1
},
{
.direction = TF_DIR_TX,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1167,
+ .key_start_idx = 1252,
.blob_key_bit_size = 81,
.key_bit_size = 81,
- .key_num_fields = 42,
- .result_start_idx = 768,
+ .key_num_fields = 43,
+ .result_start_idx = 802,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_TX,
- .key_start_idx = 1209,
+ .key_start_idx = 1295,
.blob_key_bit_size = 104,
.key_bit_size = 104,
.key_num_fields = 7,
- .result_start_idx = 776,
+ .result_start_idx = 810,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
- }
-};
-
-struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
- {
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_TX,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
+ .key_start_idx = 1302,
+ .blob_key_bit_size = 167,
+ .key_bit_size = 167,
+ .key_num_fields = 13,
+ .result_start_idx = 819,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 37,
+ .ident_nums = 1,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
{
- .field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1315,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 832,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 38,
+ .ident_nums = 1
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_TX,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .key_start_idx = 1318,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 833,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+ .resource_type = TF_MEM_INTERNAL,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1361,
+ .blob_key_bit_size = 104,
+ .key_bit_size = 104,
+ .key_num_fields = 7,
+ .result_start_idx = 841,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ }
+};
+
+struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
.spec_operand = {
(BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 9,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 7,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 12,
},
{
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 2,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
+ BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
+ BNXT_ULP_SYM_L3_HDR_VALID_YES,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 9,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 7,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
+ .field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff,
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
- BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_ISIP_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 4,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF7_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF9_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 2,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF11_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF13_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 12,
},
{
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 12,
},
{
.field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_L2_HDR_VALID_YES,
+ BNXT_ULP_SYM_TUN_HDR_VALID_YES,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF14_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_TCP_DST_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_TCP_SRC_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 32,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 48,
},
{
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 12,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 4,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L2_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF15_IDX_I_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_I_UDP_DST_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
- {
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_I_UDP_SRC_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- (BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_I_IPV4_PROTO_ID & 0xff,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_I_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_I_IPV4_SRC_ADDR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 48,
{
.field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF15_IDX_T_VXLAN_VNI >> 8) & 0xff,
- BNXT_ULP_HF15_IDX_T_VXLAN_VNI & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 48,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
- BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_TYPE_NONE,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 3,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TUN_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL4_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL3_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL2_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
+ BNXT_ULP_SYM_IP_PROTO_UDP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_TYPE_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV6_PROTO_ID & 0xff,
+ BNXT_ULP_SYM_IP_PROTO_TCP,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 2,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L4_HDR_VALID_YES,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 2,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 1,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF20_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_TCP_DST_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_TCP_SRC_PORT & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_TCP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
+ .field_bit_size = 7,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 32,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 48,
+ .field_bit_size = 16,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 24,
+ .field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 10,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.spec_operand = {
- BNXT_ULP_SYM_L3_HDR_ISIP_YES,
+ BNXT_ULP_SYM_L3_HDR_TYPE_IPV6,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 32,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 14,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 32,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x81, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 14,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff,
+ BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {
- BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 6,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x81, 0x00}
- },
- {
- .field_bit_size = 12,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .result_operand = {
- (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 80,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
},
{
.field_bit_size = 11,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
},
{
.field_bit_size = 12,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
.result_operand = {
- (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff,
- BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff,
+ (BNXT_ULP_CF_IDX_VF_FUNC_VNIC >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_VF_FUNC_VNIC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 16,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 14,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 6,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 11,
+ .field_bit_size = 16,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ BNXT_ULP_SYM_VF_FUNC_PARIF,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 6,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .field_bit_size = 32,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_CF_IDX_VF_FUNC_VNIC >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_VNIC & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 32,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 14,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 6,
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
+ .field_bit_size = 12,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 14,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 7,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
- .result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {
- BNXT_ULP_SYM_VF_FUNC_PARIF,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 6,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
+ .field_bit_size = 11,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 16,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 32,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
- .result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 32,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
- .result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 14,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 12,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff,
+ BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 11,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 16,
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
+ .field_bit_size = 6,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 16,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 12,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
- (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 1,
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0005 >> 8) & 0xff,
+ 0x0005 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 33,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 4,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 9,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 6,
+ .field_bit_size = 11,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 2,
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 2,
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 14,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 6,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 3,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 16,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
+ .field_bit_size = 2,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 11,
+ .field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 10,
+ .field_bit_size = 8,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0005 >> 8) & 0xff,
+ 0x0005 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 33,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 12,
+ .field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff,
- BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 1,
+ .field_bit_size = 11,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 2,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 10,
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0005 >> 8) & 0xff,
- 0x0005 & 0xff,
+ (0x00f9 >> 8) & 0xff,
+ 0x00f9 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00f9 >> 8) & 0xff,
- 0x00f9 & 0xff,
+ (0x0031 >> 8) & 0xff,
+ 0x0031 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00fb >> 8) & 0xff,
- 0x00fb & 0xff,
+ (0x0031 >> 8) & 0xff,
+ 0x0031 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 4,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF,
.result_operand = {
- (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .result_operand_true = {
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .result_operand_false = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
},
{
.field_bit_size = 16,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0031 >> 8) & 0xff,
- 0x0031 & 0xff,
+ (0x00f9 >> 8) & 0xff,
+ 0x00f9 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
- (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
- (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
- (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 10,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .result_operand = {
- (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- },
- {
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
- (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00f9 >> 8) & 0xff,
- 0x00f9 & 0xff,
+ (0x0003 >> 8) & 0xff,
+ 0x0003 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0061 >> 8) & 0xff,
+ 0x0061 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_true = {
- (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff,
+ (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.result_operand_false = {
.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
.ident_bit_size = 10,
.ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
}
};