/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2020 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
* All rights reserved.
*/
#include "ulp_template_struct.h"
#include "ulp_rte_parser.h"
+/* Define the template structures */
+/*
+ * Classification signature table:
+ * maps hash id to ulp_class_match_list[] index
+ */
uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
[BNXT_ULP_CLASS_HID_0138] = 1,
[BNXT_ULP_CLASS_HID_03f0] = 2,
[BNXT_ULP_CLASS_HID_05b9] = 146,
[BNXT_ULP_CLASS_HID_0371] = 147,
[BNXT_ULP_CLASS_HID_00e1] = 148,
- [BNXT_ULP_CLASS_HID_048b] = 149,
- [BNXT_ULP_CLASS_HID_0749] = 150,
- [BNXT_ULP_CLASS_HID_05f1] = 151,
- [BNXT_ULP_CLASS_HID_04b7] = 152,
- [BNXT_ULP_CLASS_HID_049b] = 153,
- [BNXT_ULP_CLASS_HID_0759] = 154,
- [BNXT_ULP_CLASS_HID_05e1] = 155,
- [BNXT_ULP_CLASS_HID_04a7] = 156,
- [BNXT_ULP_CLASS_HID_0301] = 157,
- [BNXT_ULP_CLASS_HID_07f9] = 158,
- [BNXT_ULP_CLASS_HID_0397] = 159,
- [BNXT_ULP_CLASS_HID_068f] = 160,
- [BNXT_ULP_CLASS_HID_02f1] = 161,
- [BNXT_ULP_CLASS_HID_0609] = 162,
- [BNXT_ULP_CLASS_HID_0267] = 163,
- [BNXT_ULP_CLASS_HID_077f] = 164,
- [BNXT_ULP_CLASS_HID_01e1] = 165,
- [BNXT_ULP_CLASS_HID_0329] = 166,
- [BNXT_ULP_CLASS_HID_01c1] = 167,
- [BNXT_ULP_CLASS_HID_0309] = 168,
- [BNXT_ULP_CLASS_HID_01d1] = 169,
- [BNXT_ULP_CLASS_HID_0319] = 170,
- [BNXT_ULP_CLASS_HID_01e2] = 171,
- [BNXT_ULP_CLASS_HID_032a] = 172,
- [BNXT_ULP_CLASS_HID_0650] = 173,
- [BNXT_ULP_CLASS_HID_0198] = 174,
- [BNXT_ULP_CLASS_HID_01c2] = 175,
- [BNXT_ULP_CLASS_HID_030a] = 176,
- [BNXT_ULP_CLASS_HID_0670] = 177,
- [BNXT_ULP_CLASS_HID_01b8] = 178,
- [BNXT_ULP_CLASS_HID_01d2] = 179,
- [BNXT_ULP_CLASS_HID_031a] = 180,
- [BNXT_ULP_CLASS_HID_0660] = 181,
- [BNXT_ULP_CLASS_HID_01a8] = 182,
- [BNXT_ULP_CLASS_HID_01dd] = 183,
- [BNXT_ULP_CLASS_HID_0315] = 184,
- [BNXT_ULP_CLASS_HID_003d] = 185,
- [BNXT_ULP_CLASS_HID_02f5] = 186,
- [BNXT_ULP_CLASS_HID_01cd] = 187,
- [BNXT_ULP_CLASS_HID_0305] = 188,
- [BNXT_ULP_CLASS_HID_01de] = 189,
- [BNXT_ULP_CLASS_HID_0316] = 190,
- [BNXT_ULP_CLASS_HID_066c] = 191,
- [BNXT_ULP_CLASS_HID_01a4] = 192,
- [BNXT_ULP_CLASS_HID_003e] = 193,
- [BNXT_ULP_CLASS_HID_02f6] = 194,
- [BNXT_ULP_CLASS_HID_078c] = 195,
- [BNXT_ULP_CLASS_HID_0044] = 196,
- [BNXT_ULP_CLASS_HID_01ce] = 197,
- [BNXT_ULP_CLASS_HID_0306] = 198,
- [BNXT_ULP_CLASS_HID_067c] = 199,
- [BNXT_ULP_CLASS_HID_01b4] = 200
+ [BNXT_ULP_CLASS_HID_0000] = 149,
+ [BNXT_ULP_CLASS_HID_00ce] = 150,
+ [BNXT_ULP_CLASS_HID_01b6] = 151,
+ [BNXT_ULP_CLASS_HID_0074] = 152,
+ [BNXT_ULP_CLASS_HID_00fe] = 153,
+ [BNXT_ULP_CLASS_HID_03bc] = 154,
+ [BNXT_ULP_CLASS_HID_0206] = 155,
+ [BNXT_ULP_CLASS_HID_02c4] = 156,
+ [BNXT_ULP_CLASS_HID_055a] = 157,
+ [BNXT_ULP_CLASS_HID_045a] = 158,
+ [BNXT_ULP_CLASS_HID_061a] = 159,
+ [BNXT_ULP_CLASS_HID_051a] = 160,
+ [BNXT_ULP_CLASS_HID_074a] = 161,
+ [BNXT_ULP_CLASS_HID_004e] = 162,
+ [BNXT_ULP_CLASS_HID_040a] = 163,
+ [BNXT_ULP_CLASS_HID_010e] = 164,
+ [BNXT_ULP_CLASS_HID_048b] = 165,
+ [BNXT_ULP_CLASS_HID_0749] = 166,
+ [BNXT_ULP_CLASS_HID_05f1] = 167,
+ [BNXT_ULP_CLASS_HID_04b7] = 168,
+ [BNXT_ULP_CLASS_HID_049b] = 169,
+ [BNXT_ULP_CLASS_HID_0759] = 170,
+ [BNXT_ULP_CLASS_HID_05e1] = 171,
+ [BNXT_ULP_CLASS_HID_04a7] = 172,
+ [BNXT_ULP_CLASS_HID_0301] = 173,
+ [BNXT_ULP_CLASS_HID_07f9] = 174,
+ [BNXT_ULP_CLASS_HID_0397] = 175,
+ [BNXT_ULP_CLASS_HID_068f] = 176,
+ [BNXT_ULP_CLASS_HID_02f1] = 177,
+ [BNXT_ULP_CLASS_HID_0609] = 178,
+ [BNXT_ULP_CLASS_HID_0267] = 179,
+ [BNXT_ULP_CLASS_HID_077f] = 180,
+ [BNXT_ULP_CLASS_HID_01e1] = 181,
+ [BNXT_ULP_CLASS_HID_0329] = 182,
+ [BNXT_ULP_CLASS_HID_01c1] = 183,
+ [BNXT_ULP_CLASS_HID_0309] = 184,
+ [BNXT_ULP_CLASS_HID_01d1] = 185,
+ [BNXT_ULP_CLASS_HID_0319] = 186,
+ [BNXT_ULP_CLASS_HID_01e2] = 187,
+ [BNXT_ULP_CLASS_HID_032a] = 188,
+ [BNXT_ULP_CLASS_HID_0650] = 189,
+ [BNXT_ULP_CLASS_HID_0198] = 190,
+ [BNXT_ULP_CLASS_HID_01c2] = 191,
+ [BNXT_ULP_CLASS_HID_030a] = 192,
+ [BNXT_ULP_CLASS_HID_0670] = 193,
+ [BNXT_ULP_CLASS_HID_01b8] = 194,
+ [BNXT_ULP_CLASS_HID_01d2] = 195,
+ [BNXT_ULP_CLASS_HID_031a] = 196,
+ [BNXT_ULP_CLASS_HID_0660] = 197,
+ [BNXT_ULP_CLASS_HID_01a8] = 198,
+ [BNXT_ULP_CLASS_HID_01dd] = 199,
+ [BNXT_ULP_CLASS_HID_0315] = 200,
+ [BNXT_ULP_CLASS_HID_003d] = 201,
+ [BNXT_ULP_CLASS_HID_02f5] = 202,
+ [BNXT_ULP_CLASS_HID_01cd] = 203,
+ [BNXT_ULP_CLASS_HID_0305] = 204,
+ [BNXT_ULP_CLASS_HID_01de] = 205,
+ [BNXT_ULP_CLASS_HID_0316] = 206,
+ [BNXT_ULP_CLASS_HID_066c] = 207,
+ [BNXT_ULP_CLASS_HID_01a4] = 208,
+ [BNXT_ULP_CLASS_HID_003e] = 209,
+ [BNXT_ULP_CLASS_HID_02f6] = 210,
+ [BNXT_ULP_CLASS_HID_078c] = 211,
+ [BNXT_ULP_CLASS_HID_0044] = 212,
+ [BNXT_ULP_CLASS_HID_01ce] = 213,
+ [BNXT_ULP_CLASS_HID_0306] = 214,
+ [BNXT_ULP_CLASS_HID_067c] = 215,
+ [BNXT_ULP_CLASS_HID_01b4] = 216
};
+/* Array for the proto matcher list */
struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
[1] = {
.class_hid = BNXT_ULP_CLASS_HID_0138,
.wc_pri = 23
},
[149] = {
- .class_hid = BNXT_ULP_CLASS_HID_048b,
+ .class_hid = BNXT_ULP_CLASS_HID_0000,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 0
},
[150] = {
- .class_hid = BNXT_ULP_CLASS_HID_0749,
+ .class_hid = BNXT_ULP_CLASS_HID_00ce,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 1
},
[151] = {
- .class_hid = BNXT_ULP_CLASS_HID_05f1,
+ .class_hid = BNXT_ULP_CLASS_HID_01b6,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 2
},
[152] = {
- .class_hid = BNXT_ULP_CLASS_HID_04b7,
+ .class_hid = BNXT_ULP_CLASS_HID_0074,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 3
},
[153] = {
- .class_hid = BNXT_ULP_CLASS_HID_049b,
+ .class_hid = BNXT_ULP_CLASS_HID_00fe,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 4
+ },
+ [154] = {
+ .class_hid = BNXT_ULP_CLASS_HID_03bc,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 5
+ },
+ [155] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0206,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 6
+ },
+ [156] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02c4,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 7
+ },
+ [157] = {
+ .class_hid = BNXT_ULP_CLASS_HID_055a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 0
},
- [154] = {
- .class_hid = BNXT_ULP_CLASS_HID_0759,
+ [158] = {
+ .class_hid = BNXT_ULP_CLASS_HID_045a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 1
},
- [155] = {
- .class_hid = BNXT_ULP_CLASS_HID_05e1,
+ [159] = {
+ .class_hid = BNXT_ULP_CLASS_HID_061a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 2
},
- [156] = {
- .class_hid = BNXT_ULP_CLASS_HID_04a7,
+ [160] = {
+ .class_hid = BNXT_ULP_CLASS_HID_051a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 3
},
- [157] = {
- .class_hid = BNXT_ULP_CLASS_HID_0301,
+ [161] = {
+ .class_hid = BNXT_ULP_CLASS_HID_074a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 4
+ },
+ [162] = {
+ .class_hid = BNXT_ULP_CLASS_HID_004e,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 5
+ },
+ [163] = {
+ .class_hid = BNXT_ULP_CLASS_HID_040a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 6
+ },
+ [164] = {
+ .class_hid = BNXT_ULP_CLASS_HID_010e,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 7
+ },
+ [165] = {
+ .class_hid = BNXT_ULP_CLASS_HID_048b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 0
},
- [158] = {
- .class_hid = BNXT_ULP_CLASS_HID_07f9,
+ [166] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0749,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 1
},
- [159] = {
- .class_hid = BNXT_ULP_CLASS_HID_0397,
+ [167] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05f1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 2
},
- [160] = {
- .class_hid = BNXT_ULP_CLASS_HID_068f,
+ [168] = {
+ .class_hid = BNXT_ULP_CLASS_HID_04b7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 3
},
- [161] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f1,
+ [169] = {
+ .class_hid = BNXT_ULP_CLASS_HID_049b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 0
},
- [162] = {
- .class_hid = BNXT_ULP_CLASS_HID_0609,
+ [170] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0759,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 1
},
- [163] = {
- .class_hid = BNXT_ULP_CLASS_HID_0267,
+ [171] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 2
},
- [164] = {
- .class_hid = BNXT_ULP_CLASS_HID_077f,
+ [172] = {
+ .class_hid = BNXT_ULP_CLASS_HID_04a7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 3
},
- [165] = {
- .class_hid = BNXT_ULP_CLASS_HID_01e1,
+ [173] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0301,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 22,
.wc_pri = 0
},
- [166] = {
+ [174] = {
+ .class_hid = BNXT_ULP_CLASS_HID_07f9,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 1
+ },
+ [175] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0397,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 2
+ },
+ [176] = {
+ .class_hid = BNXT_ULP_CLASS_HID_068f,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 3
+ },
+ [177] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02f1,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 0
+ },
+ [178] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0609,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 1
+ },
+ [179] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0267,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 2
+ },
+ [180] = {
+ .class_hid = BNXT_ULP_CLASS_HID_077f,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 3
+ },
+ [181] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01e1,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 24,
+ .wc_pri = 0
+ },
+ [182] = {
.class_hid = BNXT_ULP_CLASS_HID_0329,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 1
},
- [167] = {
+ [183] = {
.class_hid = BNXT_ULP_CLASS_HID_01c1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 2
},
- [168] = {
+ [184] = {
.class_hid = BNXT_ULP_CLASS_HID_0309,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 3
},
- [169] = {
+ [185] = {
.class_hid = BNXT_ULP_CLASS_HID_01d1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 4
},
- [170] = {
+ [186] = {
.class_hid = BNXT_ULP_CLASS_HID_0319,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 5
},
- [171] = {
+ [187] = {
.class_hid = BNXT_ULP_CLASS_HID_01e2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 6
},
- [172] = {
+ [188] = {
.class_hid = BNXT_ULP_CLASS_HID_032a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 7
},
- [173] = {
+ [189] = {
.class_hid = BNXT_ULP_CLASS_HID_0650,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 8
},
- [174] = {
+ [190] = {
.class_hid = BNXT_ULP_CLASS_HID_0198,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 9
},
- [175] = {
+ [191] = {
.class_hid = BNXT_ULP_CLASS_HID_01c2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 10
},
- [176] = {
+ [192] = {
.class_hid = BNXT_ULP_CLASS_HID_030a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 11
},
- [177] = {
+ [193] = {
.class_hid = BNXT_ULP_CLASS_HID_0670,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 12
},
- [178] = {
+ [194] = {
.class_hid = BNXT_ULP_CLASS_HID_01b8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 13
},
- [179] = {
+ [195] = {
.class_hid = BNXT_ULP_CLASS_HID_01d2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 14
},
- [180] = {
+ [196] = {
.class_hid = BNXT_ULP_CLASS_HID_031a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 15
},
- [181] = {
+ [197] = {
.class_hid = BNXT_ULP_CLASS_HID_0660,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 16
},
- [182] = {
+ [198] = {
.class_hid = BNXT_ULP_CLASS_HID_01a8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 17
},
- [183] = {
+ [199] = {
.class_hid = BNXT_ULP_CLASS_HID_01dd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 0
},
- [184] = {
+ [200] = {
.class_hid = BNXT_ULP_CLASS_HID_0315,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 1
},
- [185] = {
+ [201] = {
.class_hid = BNXT_ULP_CLASS_HID_003d,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 2
},
- [186] = {
+ [202] = {
.class_hid = BNXT_ULP_CLASS_HID_02f5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 3
},
- [187] = {
+ [203] = {
.class_hid = BNXT_ULP_CLASS_HID_01cd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 4
},
- [188] = {
+ [204] = {
.class_hid = BNXT_ULP_CLASS_HID_0305,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 5
},
- [189] = {
+ [205] = {
.class_hid = BNXT_ULP_CLASS_HID_01de,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 6
},
- [190] = {
+ [206] = {
.class_hid = BNXT_ULP_CLASS_HID_0316,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 7
},
- [191] = {
+ [207] = {
.class_hid = BNXT_ULP_CLASS_HID_066c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 8
},
- [192] = {
+ [208] = {
.class_hid = BNXT_ULP_CLASS_HID_01a4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 9
},
- [193] = {
+ [209] = {
.class_hid = BNXT_ULP_CLASS_HID_003e,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 10
},
- [194] = {
+ [210] = {
.class_hid = BNXT_ULP_CLASS_HID_02f6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 11
},
- [195] = {
+ [211] = {
.class_hid = BNXT_ULP_CLASS_HID_078c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 12
},
- [196] = {
+ [212] = {
.class_hid = BNXT_ULP_CLASS_HID_0044,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 13
},
- [197] = {
+ [213] = {
.class_hid = BNXT_ULP_CLASS_HID_01ce,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 14
},
- [198] = {
+ [214] = {
.class_hid = BNXT_ULP_CLASS_HID_0306,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 15
},
- [199] = {
+ [215] = {
.class_hid = BNXT_ULP_CLASS_HID_067c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 16
},
- [200] = {
+ [216] = {
.class_hid = BNXT_ULP_CLASS_HID_01b4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 17
}
};
git.droids-corp.org / dpdk.git / blobdiff