net/bnxt: update RM with residual checker

[dpdk.git] / drivers / net / bnxt / tf_ulp / ulp_template_db_enum.h

diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
index 5376245..ac84f88 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
@@ -6,7 +6,7 @@
 #ifndef ULP_TEMPLATE_DB_H_
 #define ULP_TEMPLATE_DB_H_
 
-#define BNXT_ULP_REGFILE_MAX_SZ 15
+#define BNXT_ULP_REGFILE_MAX_SZ 16
 #define BNXT_ULP_MAX_NUM_DEVICES 4
 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
 #define BNXT_ULP_CACHE_TBL_MAX_SZ 4
@@ -25,7 +25,7 @@
 #define BNXT_ULP_ACT_HID_SHFTL 23
 #define BNXT_ULP_ACT_HID_MASK 255
 #define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2
-#define BNXT_ULP_GLB_RESOURCE_INFO_TBL_MAX_SZ 2
+#define BNXT_ULP_GLB_RESOURCE_INFO_TBL_MAX_SZ 3
 
 enum bnxt_ulp_action_bit {
        BNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,
@@ -133,15 +133,28 @@ enum bnxt_ulp_device_id {
        BNXT_ULP_DEVICE_ID_LAST = 4
 };
 
+enum bnxt_ulp_df_param_type {
+       BNXT_ULP_DF_PARAM_TYPE_DEV_PORT_ID = 0,
+       BNXT_ULP_DF_PARAM_TYPE_LAST = 1
+};
+
 enum bnxt_ulp_direction {
        BNXT_ULP_DIRECTION_INGRESS = 0,
        BNXT_ULP_DIRECTION_EGRESS = 1,
        BNXT_ULP_DIRECTION_LAST = 2
 };
 
+enum bnxt_ulp_flow_mem_type {
+       BNXT_ULP_FLOW_MEM_TYPE_INT = 0,
+       BNXT_ULP_FLOW_MEM_TYPE_EXT = 1,
+       BNXT_ULP_FLOW_MEM_TYPE_BOTH = 2,
+       BNXT_ULP_FLOW_MEM_TYPE_LAST = 3
+};
+
 enum bnxt_ulp_glb_regfile_index {
        BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 0,
-       BNXT_ULP_GLB_REGFILE_INDEX_LAST = 1
+       BNXT_ULP_GLB_REGFILE_INDEX_GLB_L2_CNTXT_ID = 1,
+       BNXT_ULP_GLB_REGFILE_INDEX_LAST = 2
 };
 
 enum bnxt_ulp_hdr_type {
@@ -151,13 +164,6 @@ enum bnxt_ulp_hdr_type {
        BNXT_ULP_HDR_TYPE_LAST = 3
 };
 
-enum bnxt_ulp_mark_db_opcode {
-       BNXT_ULP_MARK_DB_OPCODE_NOP = 0,
-       BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION = 1,
-       BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG = 2,
-       BNXT_ULP_MARK_DB_OPCODE_LAST = 3
-};
-
 enum bnxt_ulp_mapper_opc {
        BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0,
        BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1,
@@ -171,9 +177,16 @@ enum bnxt_ulp_mapper_opc {
        BNXT_ULP_MAPPER_OPC_LAST = 9
 };
 
+enum bnxt_ulp_mark_db_opcode {
+       BNXT_ULP_MARK_DB_OPCODE_NOP = 0,
+       BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION = 1,
+       BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG = 2,
+       BNXT_ULP_MARK_DB_OPCODE_LAST = 3
+};
+
 enum bnxt_ulp_match_type {
        BNXT_ULP_MATCH_TYPE_EM = 0,
-       BNXT_ULP_MATCH_TYPE_WC = 1,
+       BNXT_ULP_MATCH_TYPE_WM = 1,
        BNXT_ULP_MATCH_TYPE_LAST = 2
 };
 
@@ -205,8 +218,9 @@ enum bnxt_ulp_regfile_index {
        BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,
        BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,
        BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,
-       BNXT_ULP_REGFILE_INDEX_NOT_USED = 14,
-       BNXT_ULP_REGFILE_INDEX_LAST = 15
+       BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14,
+       BNXT_ULP_REGFILE_INDEX_NOT_USED = 15,
+       BNXT_ULP_REGFILE_INDEX_LAST = 16
 };
 
 enum bnxt_ulp_search_before_alloc {
@@ -251,14 +265,20 @@ enum bnxt_ulp_resource_func {
 enum bnxt_ulp_resource_sub_type {
        BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0,
        BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1,
-       BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_CNT_IDX = 3,
-       BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_CNT_IDX = 2,
+       BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT_INDEX = 3,
+       BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_INDEX = 2,
        BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0,
        BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_ACT_IDX = 1,
        BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0
 };
 
 enum bnxt_ulp_sym {
+       BNXT_ULP_SYM_ACT_REC_DROP_NO = 0,
+       BNXT_ULP_SYM_ACT_REC_DROP_YES = 1,
+       BNXT_ULP_SYM_ACT_REC_METER_EN_NO = 0,
+       BNXT_ULP_SYM_ACT_REC_METER_EN_YES = 1,
+       BNXT_ULP_SYM_ACT_REC_POP_VLAN_NO = 0,
+       BNXT_ULP_SYM_ACT_REC_POP_VLAN_YES = 1,
        BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,
        BNXT_ULP_SYM_AGG_ERROR_NO = 0,
        BNXT_ULP_SYM_AGG_ERROR_YES = 1,
@@ -392,8 +412,9 @@ enum bnxt_ulp_sym {
        BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,
        BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,
        BNXT_ULP_SYM_RESERVED_IGNORE = 0,
+       BNXT_ULP_SYM_STINGRAY_EXT_EM_MAX_KEY_SIZE = 448,
+       BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 16,
        BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,
-       BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 3,
        BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,
        BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,
        BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,
@@ -459,7 +480,12 @@ enum bnxt_ulp_sym {
        BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,
        BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,
        BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,
-       BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 3,
+       BNXT_ULP_SYM_WH_PLUS_EXT_ACT_REC = 0,
+       BNXT_ULP_SYM_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448,
+       BNXT_ULP_SYM_WH_PLUS_INT_ACT_REC = 1,
+       BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 4,
+       BNXT_ULP_SYM_WH_PLUS_MC_ACT_REC = 1,
+       BNXT_ULP_SYM_WH_PLUS_UC_ACT_REC = 0,
        BNXT_ULP_SYM_YES = 1
 };
 
@@ -559,7 +585,7 @@ enum bnxt_ulp_class_hid {
 
 enum bnxt_ulp_act_hid {
        BNXT_ULP_ACT_HID_00a1 = 0x00a1,
-       BNXT_ULP_ACT_HID_0040 = 0x0040,
-       BNXT_ULP_ACT_HID_0029 = 0x0029
+       BNXT_ULP_ACT_HID_0029 = 0x0029,
+       BNXT_ULP_ACT_HID_0040 = 0x0040
 };
 #endif