* Will be overridden when event mode rq's are setup.
*/
cnxk_nix_inb_mode_set(dev, true);
+
+ /* Allocate memory to be used as dptr for CPT ucode
+ * WRITE_SA op.
+ */
+ dev->inb.sa_dptr =
+ plt_zmalloc(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ, 0);
+ if (!dev->inb.sa_dptr) {
+ plt_err("Couldn't allocate memory for SA dptr");
+ rc = -ENOMEM;
+ goto cleanup;
+ }
}
if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY ||
if (rc) {
plt_err("Failed to initialize nix inline outb, rc=%d",
rc);
- goto cleanup;
+ goto sa_dptr_free;
}
dev->outb.lf_base = roc_nix_inl_outb_lf_base_get(nix);
- /* Skip the rest if RTE_ETH_TX_OFFLOAD_SECURITY is not enabled */
+ /* Skip the rest if DEV_TX_OFFLOAD_SECURITY is not enabled */
if (!(dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY))
- goto done;
+ return 0;
+
+ /* Allocate memory to be used as dptr for CPT ucode
+ * WRITE_SA op.
+ */
+ dev->outb.sa_dptr =
+ plt_zmalloc(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ, 0);
+ if (!dev->outb.sa_dptr) {
+ plt_err("Couldn't allocate memory for SA dptr");
+ rc = -ENOMEM;
+ goto sa_dptr_free;
+ }
rc = -ENOMEM;
/* Allocate a bitmap to alloc and free sa indexes */
plt_err("Outbound SA bmap alloc failed");
rc |= roc_nix_inl_outb_fini(nix);
- goto cleanup;
+ goto sa_dptr_free;
}
rc = -EIO;
rc |= roc_nix_inl_outb_fini(nix);
plt_free(mem);
- goto cleanup;
+ goto sa_dptr_free;
}
for (i = 0; i < dev->outb.max_sa; i++)
dev->outb.sa_bmap_mem = mem;
dev->outb.sa_bmap = bmap;
}
-
-done:
return 0;
+
+sa_dptr_free:
+ if (dev->inb.sa_dptr)
+ plt_free(dev->inb.sa_dptr);
+ if (dev->outb.sa_dptr)
+ plt_free(dev->outb.sa_dptr);
cleanup:
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)
rc |= roc_nix_inl_inb_fini(nix);
if (rc)
plt_err("Failed to cleanup nix inline inb, rc=%d", rc);
ret |= rc;
+
+ if (dev->inb.sa_dptr) {
+ plt_free(dev->inb.sa_dptr);
+ dev->inb.sa_dptr = NULL;
+ }
}
/* Cleanup Inline outbound */
plt_free(dev->outb.sa_bmap_mem);
dev->outb.sa_bmap = NULL;
dev->outb.sa_bmap_mem = NULL;
+ if (dev->outb.sa_dptr) {
+ plt_free(dev->outb.sa_dptr);
+ dev->outb.sa_dptr = NULL;
+ }
}
dev->inb.inl_dev = false;
struct cnxk_fc_cfg *fc = &dev->fc_cfg;
struct rte_eth_fc_conf fc_cfg = {0};
- if (roc_nix_is_vf_or_sdp(&dev->nix))
+ if (roc_nix_is_vf_or_sdp(&dev->nix) && !roc_nix_is_lbk(&dev->nix))
return 0;
fc_cfg.mode = fc->mode;
static int
nix_ingress_policer_setup(struct cnxk_eth_dev *dev)
{
+ struct rte_eth_dev *eth_dev = dev->eth_dev;
+ int rc = 0;
+
TAILQ_INIT(&dev->mtr_profiles);
TAILQ_INIT(&dev->mtr_policy);
TAILQ_INIT(&dev->mtr);
- return 0;
+ if (eth_dev->dev_ops->mtr_ops_get == NULL)
+ return rc;
+
+ return nix_mtr_capabilities_init(eth_dev);
}
static int
goto free_nix_lf;
}
- rc = roc_nix_switch_hdr_set(nix, dev->npc.switch_header_type);
+ rc = roc_nix_switch_hdr_set(nix, dev->npc.switch_header_type,
+ dev->npc.pre_l2_size_offset,
+ dev->npc.pre_l2_size_offset_mask,
+ dev->npc.pre_l2_size_shift_dir);
if (rc) {
plt_err("Failed to enable switch type nix_lf rc=%d", rc);
goto free_nix_lf;
goto cq_fini;
}
+ /* Setup Inline security support */
+ rc = nix_security_setup(dev);
+ if (rc)
+ goto cq_fini;
+
/* Init flow control configuration */
- fc_cfg.cq_cfg_valid = false;
+ fc_cfg.type = ROC_NIX_FC_RXCHAN_CFG;
fc_cfg.rxchan_cfg.enable = true;
rc = roc_nix_fc_config_set(nix, &fc_cfg);
if (rc) {
goto cq_fini;
}
- /* Setup Inline security support */
- rc = nix_security_setup(dev);
- if (rc)
- goto cq_fini;
-
/*
* Restore queue config when reconfigure followed by
* reconfigure and no queue configure invoked from application case.
void *rxq;
/* Disable switch hdr pkind */
- roc_nix_switch_hdr_set(&dev->nix, 0);
+ roc_nix_switch_hdr_set(&dev->nix, 0, 0, 0, 0);
/* Stop link change events */
if (!roc_nix_is_vf_or_sdp(&dev->nix))
int rc, max_entries;
eth_dev->dev_ops = &cnxk_eth_dev_ops;
+ eth_dev->rx_queue_count = cnxk_nix_rx_queue_count;
+ eth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status;
+ eth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status;
/* Alloc security context */
sec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0);
sec_ctx->flags =
(RTE_SEC_CTX_F_FAST_SET_MDATA | RTE_SEC_CTX_F_FAST_GET_UDATA);
eth_dev->security_ctx = sec_ctx;
- TAILQ_INIT(&dev->inb.list);
- TAILQ_INIT(&dev->outb.list);
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
dev->configured = 0;
dev->ptype_disable = 0;
+ TAILQ_INIT(&dev->inb.list);
+ TAILQ_INIT(&dev->outb.list);
+ rte_spinlock_init(&dev->inb.lock);
+ rte_spinlock_init(&dev->outb.lock);
+
/* For vfs, returned max_entries will be 0. but to keep default mac
* address, one entry must be allocated. so setting up to 1.
*/