net/cnxk: add Rx burst for CN10K
[dpdk.git] / drivers / net / cnxk / cnxk_ethdev.h
index daa87af..276e569 100644 (file)
@@ -10,6 +10,9 @@
 #include <ethdev_driver.h>
 #include <ethdev_pci.h>
 #include <rte_kvargs.h>
+#include <rte_mbuf.h>
+#include <rte_mbuf_pool_ops.h>
+#include <rte_mempool.h>
 
 #include "roc_api.h"
 
 #define CNXK_NIX_TX_NB_SEG_MAX 9
 #endif
 
+#define CNXK_NIX_TX_MSEG_SG_DWORDS                                             \
+       ((RTE_ALIGN_MUL_CEIL(CNXK_NIX_TX_NB_SEG_MAX, 3) / 3) +                 \
+        CNXK_NIX_TX_NB_SEG_MAX)
+
 #define CNXK_NIX_RSS_L3_L4_SRC_DST                                             \
        (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY |     \
         ETH_RSS_L4_DST_ONLY)
 #define RSS_SCTP_INDEX 4
 #define RSS_DMAC_INDEX 5
 
+/* Default mark value used when none is provided. */
+#define CNXK_FLOW_ACTION_FLAG_DEFAULT 0xffff
+
+#define PTYPE_NON_TUNNEL_WIDTH   16
+#define PTYPE_TUNNEL_WIDTH       12
+#define PTYPE_NON_TUNNEL_ARRAY_SZ BIT(PTYPE_NON_TUNNEL_WIDTH)
+#define PTYPE_TUNNEL_ARRAY_SZ    BIT(PTYPE_TUNNEL_WIDTH)
+#define PTYPE_ARRAY_SZ                                                         \
+       ((PTYPE_NON_TUNNEL_ARRAY_SZ + PTYPE_TUNNEL_ARRAY_SZ) * sizeof(uint16_t))
+/* Fastpath lookup */
+#define CNXK_NIX_FASTPATH_LOOKUP_MEM "cnxk_nix_fastpath_lookup_mem"
+
+#define CNXK_NIX_UDP_TUN_BITMASK                                               \
+       ((1ull << (PKT_TX_TUNNEL_VXLAN >> 45)) |                               \
+        (1ull << (PKT_TX_TUNNEL_GENEVE >> 45)))
+
 struct cnxk_eth_qconf {
        union {
                struct rte_eth_txconf tx;
@@ -116,6 +139,7 @@ struct cnxk_eth_dev {
        uint8_t max_mac_entries;
 
        uint16_t flags;
+       uint8_t ptype_disable;
        bool scalar_ena;
 
        /* Pointer back to rte */
@@ -147,6 +171,9 @@ struct cnxk_eth_dev {
        struct cnxk_eth_qconf *tx_qconf;
        struct cnxk_eth_qconf *rx_qconf;
 
+       /* Rx burst for cleanup(Only Primary) */
+       eth_rx_burst_t rx_pkt_burst_no_offload;
+
        /* Default mac address */
        uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
 
@@ -194,6 +221,16 @@ int cnxk_nix_remove(struct rte_pci_device *pci_dev);
 int cnxk_nix_info_get(struct rte_eth_dev *eth_dev,
                      struct rte_eth_dev_info *dev_info);
 int cnxk_nix_configure(struct rte_eth_dev *eth_dev);
+int cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
+                           uint16_t nb_desc, uint16_t fp_tx_q_sz,
+                           const struct rte_eth_txconf *tx_conf);
+int cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
+                           uint16_t nb_desc, uint16_t fp_rx_q_sz,
+                           const struct rte_eth_rxconf *rx_conf,
+                           struct rte_mempool *mp);
+int cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid);
+
+uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);
 
 /* RSS */
 uint32_t cnxk_rss_ethdev_to_nix(struct cnxk_eth_dev *dev, uint64_t ethdev_rss,
@@ -204,8 +241,79 @@ void cnxk_eth_dev_link_status_cb(struct roc_nix *nix,
                                 struct roc_nix_link_info *link);
 int cnxk_nix_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete);
 
+/* Lookup configuration */
+const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);
+void *cnxk_nix_fastpath_lookup_mem_get(void);
+
 /* Devargs */
 int cnxk_ethdev_parse_devargs(struct rte_devargs *devargs,
                              struct cnxk_eth_dev *dev);
 
+/* Inlines */
+static __rte_always_inline uint64_t
+cnxk_pktmbuf_detach(struct rte_mbuf *m)
+{
+       struct rte_mempool *mp = m->pool;
+       uint32_t mbuf_size, buf_len;
+       struct rte_mbuf *md;
+       uint16_t priv_size;
+       uint16_t refcount;
+
+       /* Update refcount of direct mbuf */
+       md = rte_mbuf_from_indirect(m);
+       refcount = rte_mbuf_refcnt_update(md, -1);
+
+       priv_size = rte_pktmbuf_priv_size(mp);
+       mbuf_size = (uint32_t)(sizeof(struct rte_mbuf) + priv_size);
+       buf_len = rte_pktmbuf_data_room_size(mp);
+
+       m->priv_size = priv_size;
+       m->buf_addr = (char *)m + mbuf_size;
+       m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size;
+       m->buf_len = (uint16_t)buf_len;
+       rte_pktmbuf_reset_headroom(m);
+       m->data_len = 0;
+       m->ol_flags = 0;
+       m->next = NULL;
+       m->nb_segs = 1;
+
+       /* Now indirect mbuf is safe to free */
+       rte_pktmbuf_free(m);
+
+       if (refcount == 0) {
+               rte_mbuf_refcnt_set(md, 1);
+               md->data_len = 0;
+               md->ol_flags = 0;
+               md->next = NULL;
+               md->nb_segs = 1;
+               return 0;
+       } else {
+               return 1;
+       }
+}
+
+static __rte_always_inline uint64_t
+cnxk_nix_prefree_seg(struct rte_mbuf *m)
+{
+       if (likely(rte_mbuf_refcnt_read(m) == 1)) {
+               if (!RTE_MBUF_DIRECT(m))
+                       return cnxk_pktmbuf_detach(m);
+
+               m->next = NULL;
+               m->nb_segs = 1;
+               return 0;
+       } else if (rte_mbuf_refcnt_update(m, -1) == 0) {
+               if (!RTE_MBUF_DIRECT(m))
+                       return cnxk_pktmbuf_detach(m);
+
+               rte_mbuf_refcnt_set(m, 1);
+               m->next = NULL;
+               m->nb_segs = 1;
+               return 0;
+       }
+
+       /* Mbuf is having refcount more than 1 so need not to be freed */
+       return 1;
+}
+
 #endif /* __CNXK_ETHDEV_H__ */