net/sfc: check ID overflow in action port ID

[dpdk.git] / drivers / net / cnxk / cnxk_ethdev.h

diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index cd08e3a..4eead03 100644 (file)
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -76,7 +76,8 @@
        (DEV_RX_OFFLOAD_CHECKSUM | DEV_RX_OFFLOAD_SCTP_CKSUM |                 \
         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_SCATTER |            \
         DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |         \
-        DEV_RX_OFFLOAD_RSS_HASH | DEV_RX_OFFLOAD_TIMESTAMP)
+        DEV_RX_OFFLOAD_RSS_HASH | DEV_RX_OFFLOAD_TIMESTAMP |                  \
+        DEV_RX_OFFLOAD_VLAN_STRIP)
 
 #define RSS_IPV4_ENABLE                                                        \
        (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_UDP |         \
@@ -135,13 +136,12 @@ struct cnxk_eth_qconf {
 };
 
 struct cnxk_timesync_info {
+       uint8_t rx_ready;
+       uint64_t rx_tstamp;
        uint64_t rx_tstamp_dynflag;
+       int tstamp_dynfield_offset;
        rte_iova_t tx_tstamp_iova;
        uint64_t *tx_tstamp;
-       uint64_t rx_tstamp;
-       int tstamp_dynfield_offset;
-       uint8_t tx_ready;
-       uint8_t rx_ready;
 } __plt_cache_aligned;
 
 struct cnxk_eth_dev {
@@ -162,6 +162,7 @@ struct cnxk_eth_dev {
        uint8_t configured;
 
        /* Max macfilter entries */
+       uint8_t dmac_filter_count;
        uint8_t max_mac_entries;
        bool dmac_filter_enable;
 
@@ -265,6 +266,9 @@ int cnxk_nix_probe(struct rte_pci_driver *pci_drv,
                   struct rte_pci_device *pci_dev);
 int cnxk_nix_remove(struct rte_pci_device *pci_dev);
 int cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu);
+int cnxk_nix_mc_addr_list_configure(struct rte_eth_dev *eth_dev,
+                                   struct rte_ether_addr *mc_addr_set,
+                                   uint32_t nb_mc_addr);
 int cnxk_nix_mac_addr_add(struct rte_eth_dev *eth_dev,
                          struct rte_ether_addr *addr, uint32_t index,
                          uint32_t pool);
@@ -460,13 +464,15 @@ cnxk_nix_timestamp_dynfield(struct rte_mbuf *mbuf,
 
 static __rte_always_inline void
 cnxk_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
-                       struct cnxk_timesync_info *tstamp, bool ts_enable,
+                       struct cnxk_timesync_info *tstamp,
+                       const uint8_t ts_enable, const uint8_t mseg_enable,
                        uint64_t *tstamp_ptr)
 {
-       if (ts_enable &&
-           (mbuf->data_off ==
-            RTE_PKTMBUF_HEADROOM + CNXK_NIX_TIMESYNC_RX_OFFSET)) {
-               mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
+       if (ts_enable) {
+               if (!mseg_enable) {
+                       mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
+                       mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
+               }
 
                /* Reading the rx timestamp inserted by CGX, viz at
                 * starting of the packet data.