#include <rte_security_driver.h>
#include <rte_tailq.h>
#include <rte_time.h>
+#include <rte_tm_driver.h>
#include "roc_api.h"
/* SPI will be in 20 bits of tag */
#define CNXK_ETHDEV_SPI_TAG_MASK 0xFFFFFUL
+#define CNXK_NIX_PFC_CHAN_COUNT 16
+
+#define CNXK_TM_MARK_VLAN_DEI BIT_ULL(0)
+#define CNXK_TM_MARK_IP_DSCP BIT_ULL(1)
+#define CNXK_TM_MARK_IP_ECN BIT_ULL(2)
+
+#define CNXK_TM_MARK_MASK \
+ (CNXK_TM_MARK_VLAN_DEI | CNXK_TM_MARK_IP_DSCP | CNXK_TM_MARK_IP_ECN)
+
+#define CNXK_TX_MARK_FMT_MASK (0xFFFFFFFFFFFFull)
+
struct cnxk_fc_cfg {
enum rte_eth_fc_mode mode;
uint8_t rx_pause;
uint8_t tx_pause;
};
+struct cnxk_pfc_cfg {
+ struct cnxk_fc_cfg fc_cfg;
+ uint16_t class_en;
+ uint16_t pause_time;
+ uint8_t rx_tc;
+ uint8_t rx_qid;
+ uint8_t tx_tc;
+ uint8_t tx_qid;
+};
+
struct cnxk_eth_qconf {
union {
struct rte_eth_txconf tx;
/* Using inbound with inline device */
bool inl_dev;
- /* Device argument to force inline device for inb */
- bool force_inl_dev;
+ /* Device argument to disable inline device usage for inb */
+ bool no_inl_dev;
/* Active sessions */
uint16_t nb_sess;
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
/* Outbound security data */
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
struct cnxk_eth_dev {
uint16_t flags;
uint8_t ptype_disable;
bool scalar_ena;
+ bool tx_mark;
bool ptp_en;
+ bool rx_mark_update; /* Enable/Disable mark update to mbuf */
/* Pointer back to rte */
struct rte_eth_dev *eth_dev;
struct {
uint64_t cq_min_4k : 1;
uint64_t ipsecd_drop_re_dis : 1;
+ uint64_t vec_drop_re_dis : 1;
};
uint64_t hwcap;
};
struct cnxk_eth_qconf *rx_qconf;
/* Flow control configuration */
+ uint16_t pfc_tc_sq_map[CNXK_NIX_PFC_CHAN_COUNT];
+ struct cnxk_pfc_cfg pfc_cfg;
struct cnxk_fc_cfg fc_cfg;
/* PTP Counters */
/* Security data */
struct cnxk_eth_dev_sec_inb inb;
struct cnxk_eth_dev_sec_outb outb;
+
+ /* Reassembly dynfield/flag offsets */
+ int reass_dynfield_off;
+ int reass_dynflag_bit;
};
struct cnxk_eth_rxq_sp {
/* Common security ops */
extern struct rte_security_ops cnxk_eth_sec_ops;
+/* Common tm ops */
+extern struct rte_tm_ops cnxk_tm_ops;
+
/* Ops */
int cnxk_nix_probe(struct rte_pci_driver *pci_drv,
struct rte_pci_device *pci_dev);
struct rte_eth_fc_conf *fc_conf);
int cnxk_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev,
struct rte_eth_fc_conf *fc_conf);
+int cnxk_nix_priority_flow_ctrl_queue_config(struct rte_eth_dev *eth_dev,
+ struct rte_eth_pfc_queue_conf *pfc_conf);
+int cnxk_nix_priority_flow_ctrl_queue_info_get(struct rte_eth_dev *eth_dev,
+ struct rte_eth_pfc_queue_info *pfc_info);
int cnxk_nix_set_link_up(struct rte_eth_dev *eth_dev);
int cnxk_nix_set_link_down(struct rte_eth_dev *eth_dev);
int cnxk_nix_get_module_info(struct rte_eth_dev *eth_dev,
int cnxk_nix_tm_ops_get(struct rte_eth_dev *eth_dev, void *ops);
int cnxk_nix_tm_set_queue_rate_limit(struct rte_eth_dev *eth_dev,
uint16_t queue_idx, uint16_t tx_rate);
+int cnxk_nix_tm_mark_vlan_dei(struct rte_eth_dev *eth_dev, int mark_green,
+ int mark_yellow, int mark_red,
+ struct rte_tm_error *error);
+int cnxk_nix_tm_mark_ip_ecn(struct rte_eth_dev *eth_dev, int mark_green,
+ int mark_yellow, int mark_red,
+ struct rte_tm_error *error);
+int cnxk_nix_tm_mark_ip_dscp(struct rte_eth_dev *eth_dev, int mark_green,
+ int mark_yellow, int mark_red,
+ struct rte_tm_error *error);
/* MTR */
int cnxk_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops);
void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,
struct rte_eth_txq_info *qinfo);
+/* Queue status */
+int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset);
+int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset);
+uint32_t cnxk_nix_rx_queue_count(void *rxq);
+
/* Lookup configuration */
const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);
void *cnxk_nix_fastpath_lookup_mem_get(void);
uint32_t cur_id);
int nix_mtr_level_update(struct rte_eth_dev *eth_dev, uint32_t id,
uint32_t level);
+int nix_mtr_capabilities_init(struct rte_eth_dev *eth_dev);
int nix_mtr_configure(struct rte_eth_dev *eth_dev, uint32_t id);
int nix_mtr_connect(struct rte_eth_dev *eth_dev, uint32_t id);
int nix_mtr_destroy(struct rte_eth_dev *eth_dev, uint32_t id,
uint32_t *prev_id, uint32_t *next_id,
struct cnxk_mtr_policy_node *policy,
int *tree_level);
+int nix_priority_flow_ctrl_configure(struct rte_eth_dev *eth_dev,
+ struct cnxk_pfc_cfg *conf);
/* Inlines */
static __rte_always_inline uint64_t
rte_mbuf_timestamp_t *);
}
-static __rte_always_inline void
-cnxk_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
- struct cnxk_timesync_info *tstamp,
- const uint8_t ts_enable, const uint8_t mseg_enable,
- uint64_t *tstamp_ptr)
-{
- if (ts_enable) {
- if (!mseg_enable) {
- mbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
- mbuf->data_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;
- }
-
- /* Reading the rx timestamp inserted by CGX, viz at
- * starting of the packet data.
- */
- *cnxk_nix_timestamp_dynfield(mbuf, tstamp) =
- rte_be_to_cpu_64(*tstamp_ptr);
- /* RTE_MBUF_F_RX_IEEE1588_TMST flag needs to be set only in case
- * PTP packets are received.
- */
- if (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {
- tstamp->rx_tstamp =
- *cnxk_nix_timestamp_dynfield(mbuf, tstamp);
- tstamp->rx_ready = 1;
- mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
- RTE_MBUF_F_RX_IEEE1588_TMST |
- tstamp->rx_tstamp_dynflag;
- }
- }
-}
-
static __rte_always_inline uintptr_t
cnxk_nix_sa_base_get(uint16_t port, const void *lookup_mem)
{
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