examples/l3fwd: share queue size variables

[dpdk.git] / drivers / net / cnxk / cnxk_ptp.c

diff --git a/drivers/net/cnxk/cnxk_ptp.c b/drivers/net/cnxk/cnxk_ptp.c
index 52f6eb1..359f9a3 100644 (file)
--- a/drivers/net/cnxk/cnxk_ptp.c
+++ b/drivers/net/cnxk/cnxk_ptp.c
@@ -4,6 +4,23 @@
 
 #include "cnxk_ethdev.h"
 
+int
+cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock)
+{
+       struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+       /* This API returns the raw PTP HI clock value. Since LFs do not
+        * have direct access to PTP registers and it requires mbox msg
+        * to AF for this value. In fastpath reading this value for every
+        * packet (which involves mbox call) becomes very expensive, hence
+        * we should be able to derive PTP HI clock value from tsc by
+        * using freq_mult and clk_delta calculated during configure stage.
+        */
+       *clock = (rte_get_tsc_cycles() + dev->clk_delta) * dev->clk_freq_mult;
+
+       return 0;
+}
+
 /* This function calculates two parameters "clk_freq_mult" and
  * "clk_delta" which is useful in deriving PTP HI clock from
  * timestamp counter (tsc) value.
@@ -210,7 +227,7 @@ cnxk_nix_timesync_enable(struct rte_eth_dev *eth_dev)
        dev->rx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;
        dev->tx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;
 
-       dev->rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
+       dev->rx_offloads |= RTE_ETH_RX_OFFLOAD_TIMESTAMP;
 
        rc = roc_nix_ptp_rx_ena_dis(nix, true);
        if (!rc) {
@@ -240,7 +257,7 @@ int
 cnxk_nix_timesync_disable(struct rte_eth_dev *eth_dev)
 {
        struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
-       uint64_t rx_offloads = DEV_RX_OFFLOAD_TIMESTAMP;
+       uint64_t rx_offloads = RTE_ETH_RX_OFFLOAD_TIMESTAMP;
        struct roc_nix *nix = &dev->nix;
        int rc = 0;