net/cxgbe: add devarg to control Tx coalescing

[dpdk.git] / drivers / net / cxgbe / base / adapter.h

diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h
index fb8af52..6758364 100644 (file)
--- a/drivers/net/cxgbe/base/adapter.h
+++ b/drivers/net/cxgbe/base/adapter.h
@@ -299,6 +299,12 @@ struct mbox_entry {
 
 TAILQ_HEAD(mbox_list, mbox_entry);
 
+struct adapter_devargs {
+       bool keep_ovlan;
+       bool force_link_up;
+       bool tx_mode_latency;
+};
+
 struct adapter {
        struct rte_pci_device *pdev;       /* associated rte pci device */
        struct rte_eth_dev *eth_dev;       /* first port's rte eth device */
@@ -331,6 +337,8 @@ struct adapter {
        struct mpstcam_table *mpstcam;
 
        struct tid_info tids;     /* Info used to access TID related tables */
+
+       struct adapter_devargs devargs;
 };
 
 /**
@@ -368,7 +376,7 @@ static inline void t4_os_write_unlock(rte_rwlock_t *lock)
  */
 static inline struct port_info *ethdev2pinfo(const struct rte_eth_dev *dev)
 {
-       return (struct port_info *)dev->data->dev_private;
+       return dev->data->dev_private;
 }
 
 /**
@@ -450,11 +458,7 @@ static inline uint64_t cxgbe_write_addr64(volatile void *addr, uint64_t val)
  */
 static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
 {
-       u32 val = CXGBE_READ_REG(adapter, reg_addr);
-
-       CXGBE_DEBUG_REG(adapter, "read register 0x%x value 0x%x\n", reg_addr,
-                       val);
-       return val;
+       return CXGBE_READ_REG(adapter, reg_addr);
 }
 
 /**
@@ -467,8 +471,6 @@ static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
  */
 static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
 {
-       CXGBE_DEBUG_REG(adapter, "setting register 0x%x to 0x%x\n", reg_addr,
-                       val);
        CXGBE_WRITE_REG(adapter, reg_addr, val);
 }
 
@@ -483,8 +485,6 @@ static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
 static inline void t4_write_reg_relaxed(struct adapter *adapter, u32 reg_addr,
                                        u32 val)
 {
-       CXGBE_DEBUG_REG(adapter, "setting register 0x%x to 0x%x\n", reg_addr,
-                       val);
        CXGBE_WRITE_REG_RELAXED(adapter, reg_addr, val);
 }
 
@@ -497,11 +497,7 @@ static inline void t4_write_reg_relaxed(struct adapter *adapter, u32 reg_addr,
  */
 static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
 {
-       u64 val = CXGBE_READ_REG64(adapter, reg_addr);
-
-       CXGBE_DEBUG_REG(adapter, "64-bit read register %#x value %#llx\n",
-                       reg_addr, (unsigned long long)val);
-       return val;
+       return CXGBE_READ_REG64(adapter, reg_addr);
 }
 
 /**
@@ -515,9 +511,6 @@ static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
 static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr,
                                  u64 val)
 {
-       CXGBE_DEBUG_REG(adapter, "setting register %#x to %#llx\n", reg_addr,
-                       (unsigned long long)val);
-
        CXGBE_WRITE_REG64(adapter, reg_addr, val);
 }
 
@@ -671,7 +664,7 @@ static inline void t4_os_set_hw_addr(struct adapter *adapter, int port_idx,
 {
        struct port_info *pi = adap2pinfo(adapter, port_idx);
 
-       ether_addr_copy((struct ether_addr *)hw_addr,
+       rte_ether_addr_copy((struct rte_ether_addr *)hw_addr,
                        &pi->eth_dev->data->mac_addrs[0]);
 }