#include "t4_regs_values.h"
enum {
- MAX_ETH_QSETS = 64, /* # of Ethernet Tx/Rx queue sets */
MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */
};
u8 pidx; /* port index for this PF */
u8 tx_chan; /* associated channel */
- u8 n_rx_qsets; /* # of rx qsets */
- u8 n_tx_qsets; /* # of tx qsets */
- u8 first_qset; /* index of first qset */
+ u16 n_rx_qsets; /* # of rx qsets */
+ u16 n_tx_qsets; /* # of tx qsets */
+ u16 first_rxqset; /* index of first rxqset */
+ u16 first_txqset; /* index of first txqset */
u16 *rss; /* rss table */
u8 rss_mode; /* rss mode */
};
struct sge_eth_rxq { /* a SW Ethernet Rx queue */
+ unsigned int flags; /* flags for state of the queue */
struct sge_rspq rspq;
struct sge_fl fl;
struct sge_eth_rx_stats stats;
struct tx_eth_coal_desc coalesce;
};
-enum {
+enum cxgbe_txq_state {
EQ_STOPPED = (1 << 0),
};
+enum cxgbe_rxq_state {
+ IQ_STOPPED = (1 << 0),
+};
+
struct eth_coalesce {
unsigned char *ptr;
unsigned char type;
} __rte_cache_aligned;
struct sge {
- struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
- struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
+ struct sge_eth_txq *ethtxq;
+ struct sge_eth_rxq *ethrxq;
struct sge_rspq fw_evtq __rte_cache_aligned;
struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
int t4_sge_eth_txq_start(struct sge_eth_txq *txq);
int t4_sge_eth_txq_stop(struct sge_eth_txq *txq);
void t4_sge_eth_txq_release(struct adapter *adap, struct sge_eth_txq *txq);
-int t4_sge_eth_rxq_start(struct adapter *adap, struct sge_rspq *rq);
-int t4_sge_eth_rxq_stop(struct adapter *adap, struct sge_rspq *rq);
+int t4_sge_eth_rxq_start(struct adapter *adap, struct sge_eth_rxq *rxq);
+int t4_sge_eth_rxq_stop(struct adapter *adap, struct sge_eth_rxq *rxq);
void t4_sge_eth_rxq_release(struct adapter *adap, struct sge_eth_rxq *rxq);
void t4_sge_eth_clear_queues(struct port_info *pi);
void t4_sge_eth_release_queues(struct port_info *pi);