net/txgbe: add Rx and Tx init

[dpdk.git] / drivers / net / cxgbe / base / t4_hw.c

diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c
index 48b6d77..9217956 100644 (file)
--- a/drivers/net/cxgbe/base/t4_hw.c
+++ b/drivers/net/cxgbe/base/t4_hw.c
@@ -2517,6 +2517,10 @@ int t4_get_pfres(struct adapter *adapter)
 
        word = be32_to_cpu(rpl.type_to_neq);
        pfres->neq = G_FW_PFVF_CMD_NEQ(word);
+
+       word = be32_to_cpu(rpl.r_caps_to_nethctrl);
+       pfres->nethctrl = G_FW_PFVF_CMD_NETHCTRL(word);
+
        return 0;
 }
 
@@ -5040,6 +5044,10 @@ int t4_prep_adapter(struct adapter *adapter)
                adapter->params.arch.mps_rplc_size = 128;
                adapter->params.arch.nchan = NCHAN;
                adapter->params.arch.vfcount = 128;
+               /* Congestion map is for 4 channels so that
+                * MPS can have 4 priority per port.
+                */
+               adapter->params.arch.cng_ch_bits_log = 2;
                break;
        case CHELSIO_T6:
                adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, pl_rev);
@@ -5049,6 +5057,10 @@ int t4_prep_adapter(struct adapter *adapter)
                adapter->params.arch.mps_rplc_size = 256;
                adapter->params.arch.nchan = 2;
                adapter->params.arch.vfcount = 256;
+               /* Congestion map is for 2 channels so that
+                * MPS can have 8 priority per port.
+                */
+               adapter->params.arch.cng_ch_bits_log = 3;
                break;
        default:
                dev_err(adapter, "%s: Device %d is not supported\n",
@@ -5215,8 +5227,8 @@ int t4_init_sge_params(struct adapter *adapter)
  */
 int t4_init_tp_params(struct adapter *adap)
 {
-       int chan;
-       u32 v;
+       int chan, ret;
+       u32 param, v;
 
        v = t4_read_reg(adap, A_TP_TIMER_RESOLUTION);
        adap->params.tp.tre = G_TIMERRESOLUTION(v);
@@ -5227,11 +5239,47 @@ int t4_init_tp_params(struct adapter *adap)
                adap->params.tp.tx_modq[chan] = chan;
 
        /*
-        * Cache the adapter's Compressed Filter Mode and global Incress
+        * Cache the adapter's Compressed Filter Mode/Mask and global Ingress
         * Configuration.
         */
-       t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA,
-                        &adap->params.tp.vlan_pri_map, 1, A_TP_VLAN_PRI_MAP);
+       param = (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) |
+                V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_FILTER) |
+                V_FW_PARAMS_PARAM_Y(FW_PARAM_DEV_FILTER_MODE_MASK));
+
+       /* Read current value */
+       ret = t4_query_params(adap, adap->mbox, adap->pf, 0,
+                             1, &param, &v);
+       if (!ret) {
+               dev_info(adap, "Current filter mode/mask 0x%x:0x%x\n",
+                        G_FW_PARAMS_PARAM_FILTER_MODE(v),
+                        G_FW_PARAMS_PARAM_FILTER_MASK(v));
+               adap->params.tp.vlan_pri_map =
+                       G_FW_PARAMS_PARAM_FILTER_MODE(v);
+               adap->params.tp.filter_mask =
+                       G_FW_PARAMS_PARAM_FILTER_MASK(v);
+       } else {
+               dev_info(adap,
+                        "Failed to read filter mode/mask via fw api, using indirect-reg-read\n");
+
+               /* In case of older-fw (which doesn't expose the api
+                * FW_PARAM_DEV_FILTER_MODE_MASK) and newer-driver (which uses
+                * the fw api) combination, fall-back to older method of reading
+                * the filter mode from indirect-register
+                */
+               t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA,
+                                &adap->params.tp.vlan_pri_map, 1,
+                                A_TP_VLAN_PRI_MAP);
+
+               /* With the older-fw and newer-driver combination we might run
+                * into an issue when user wants to use hash filter region but
+                * the filter_mask is zero, in this case filter_mask validation
+                * is tough. To avoid that we set the filter_mask same as filter
+                * mode, which will behave exactly as the older way of ignoring
+                * the filter mask validation.
+                */
+               adap->params.tp.filter_mask = adap->params.tp.vlan_pri_map;
+       }
+
        t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA,
                         &adap->params.tp.ingress_config, 1,
                         A_TP_INGRESS_CONFIG);