net/cxgbe: simplify Rx payload buffer size posting

[dpdk.git] / drivers / net / cxgbe / cxgbe.h

diff --git a/drivers/net/cxgbe/cxgbe.h b/drivers/net/cxgbe/cxgbe.h
index 7c89a02..dbcbfaf 100644 (file)
--- a/drivers/net/cxgbe/cxgbe.h
+++ b/drivers/net/cxgbe/cxgbe.h
@@ -28,32 +28,31 @@
 #define CXGBE_LINK_STATUS_POLL_CNT 100 /* Max number of times to poll */
 
 #define CXGBE_DEFAULT_RSS_KEY_LEN     40 /* 320-bits */
-#define CXGBE_RSS_HF_IPV4_MASK (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \
-                               ETH_RSS_NONFRAG_IPV4_OTHER)
-#define CXGBE_RSS_HF_IPV6_MASK (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | \
-                               ETH_RSS_NONFRAG_IPV6_OTHER | \
-                               ETH_RSS_IPV6_EX)
-#define CXGBE_RSS_HF_TCP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_TCP | \
-                                   ETH_RSS_IPV6_TCP_EX)
-#define CXGBE_RSS_HF_UDP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_UDP | \
-                                   ETH_RSS_IPV6_UDP_EX)
-#define CXGBE_RSS_HF_ALL (ETH_RSS_IP | ETH_RSS_TCP | ETH_RSS_UDP)
+#define CXGBE_RSS_HF_IPV4_MASK (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | \
+                               RTE_ETH_RSS_NONFRAG_IPV4_OTHER)
+#define CXGBE_RSS_HF_IPV6_MASK (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | \
+                               RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
+                               RTE_ETH_RSS_IPV6_EX)
+#define CXGBE_RSS_HF_TCP_IPV6_MASK (RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
+                                   RTE_ETH_RSS_IPV6_TCP_EX)
+#define CXGBE_RSS_HF_UDP_IPV6_MASK (RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
+                                   RTE_ETH_RSS_IPV6_UDP_EX)
+#define CXGBE_RSS_HF_ALL (RTE_ETH_RSS_IP | RTE_ETH_RSS_TCP | RTE_ETH_RSS_UDP)
 
 /* Tx/Rx Offloads supported */
-#define CXGBE_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT | \
-                          DEV_TX_OFFLOAD_IPV4_CKSUM | \
-                          DEV_TX_OFFLOAD_UDP_CKSUM | \
-                          DEV_TX_OFFLOAD_TCP_CKSUM | \
-                          DEV_TX_OFFLOAD_TCP_TSO | \
-                          DEV_TX_OFFLOAD_MULTI_SEGS)
-
-#define CXGBE_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP | \
-                          DEV_RX_OFFLOAD_IPV4_CKSUM | \
-                          DEV_RX_OFFLOAD_UDP_CKSUM | \
-                          DEV_RX_OFFLOAD_TCP_CKSUM | \
-                          DEV_RX_OFFLOAD_JUMBO_FRAME | \
-                          DEV_RX_OFFLOAD_SCATTER | \
-                          DEV_RX_OFFLOAD_RSS_HASH)
+#define CXGBE_TX_OFFLOADS (RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \
+                          RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \
+                          RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \
+                          RTE_ETH_TX_OFFLOAD_TCP_CKSUM | \
+                          RTE_ETH_TX_OFFLOAD_TCP_TSO | \
+                          RTE_ETH_TX_OFFLOAD_MULTI_SEGS)
+
+#define CXGBE_RX_OFFLOADS (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
+                          RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
+                          RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
+                          RTE_ETH_RX_OFFLOAD_TCP_CKSUM | \
+                          RTE_ETH_RX_OFFLOAD_SCATTER | \
+                          RTE_ETH_RX_OFFLOAD_RSS_HASH)
 
 /* Devargs filtermode and filtermask representation */
 enum cxgbe_devargs_filter_mode_flags {