return ret;
}
-static void cxgbe_get_devargs_int(struct adapter *adap, int *dst,
- const char *key, int default_value)
+static void cxgbe_get_devargs_int(struct adapter *adap, bool *dst,
+ const char *key, bool default_value)
{
struct rte_pci_device *pdev = adap->pdev;
- int ret, devarg_value = default_value;
+ int ret;
+ bool devarg_value = default_value;
*dst = default_value;
if (!pdev)
void cxgbe_process_devargs(struct adapter *adap)
{
cxgbe_get_devargs_int(adap, &adap->devargs.keep_ovlan,
- CXGBE_DEVARG_CMN_KEEP_OVLAN, 0);
+ CXGBE_DEVARG_CMN_KEEP_OVLAN, false);
cxgbe_get_devargs_int(adap, &adap->devargs.tx_mode_latency,
- CXGBE_DEVARG_CMN_TX_MODE_LATENCY, 0);
+ CXGBE_DEVARG_CMN_TX_MODE_LATENCY, false);
cxgbe_get_devargs_int(adap, &adap->devargs.force_link_up,
- CXGBE_DEVARG_VF_FORCE_LINK_UP, 0);
+ CXGBE_DEVARG_VF_FORCE_LINK_UP, false);
}
static void configure_vlan_types(struct adapter *adapter)
V_OVLAN_ETYPE(M_OVLAN_ETYPE),
V_OVLAN_MASK(M_OVLAN_MASK) |
V_OVLAN_ETYPE(0x9100));
- /* OVLAN Type 0x8100 */
- t4_set_reg_field(adapter, MPS_PORT_RX_OVLAN_REG(i, A_RX_OVLAN2),
- V_OVLAN_MASK(M_OVLAN_MASK) |
- V_OVLAN_ETYPE(M_OVLAN_ETYPE),
- V_OVLAN_MASK(M_OVLAN_MASK) |
- V_OVLAN_ETYPE(0x8100));
/* IVLAN 0X8100 */
t4_set_reg_field(adapter, MPS_PORT_RX_IVLAN(i),
t4_set_reg_field(adapter, MPS_PORT_RX_CTL(i),
F_OVLAN_EN0 | F_OVLAN_EN1 |
- F_OVLAN_EN2 | F_IVLAN_EN,
+ F_IVLAN_EN,
F_OVLAN_EN0 | F_OVLAN_EN1 |
- F_OVLAN_EN2 | F_IVLAN_EN);
+ F_IVLAN_EN);
}
t4_tp_wr_bits_indirect(adapter, A_TP_INGRESS_CONFIG, V_RM_OVLAN(1),
"filter support disabled. Continuing\n");
}
+ t4_os_lock_init(&adapter->flow_lock);
+
adapter->mpstcam = t4_init_mpstcam(adapter);
if (!adapter->mpstcam)
dev_warn(adapter, "could not allocate mps tcam table."