fix typos using codespell utility

[dpdk.git] / drivers / net / cxgbe / cxgbe_main.c

diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c
index 42238ef..eead7c0 100644 (file)
--- a/drivers/net/cxgbe/cxgbe_main.c
+++ b/drivers/net/cxgbe/cxgbe_main.c
@@ -301,7 +301,7 @@ void cfg_queues(struct rte_eth_dev *eth_dev)
                for (i = 0; i < ARRAY_SIZE(s->ethrxq); i++) {
                        struct sge_eth_rxq *r = &s->ethrxq[i];
 
-                       init_rspq(adap, &r->rspq, 0, 0, 1024, 64);
+                       init_rspq(adap, &r->rspq, 5, 32, 1024, 64);
                        r->usembufs = 1;
                        r->fl.size = (r->usembufs ? 1024 : 72);
                }
@@ -414,6 +414,36 @@ static void print_port_info(struct adapter *adap)
        }
 }
 
+static void configure_pcie_ext_tag(struct adapter *adapter)
+{
+       u16 v;
+       int pos = t4_os_find_pci_capability(adapter, PCI_CAP_ID_EXP);
+
+       if (!pos)
+               return;
+
+       if (pos > 0) {
+               t4_os_pci_read_cfg2(adapter, pos + PCI_EXP_DEVCTL, &v);
+               v |= PCI_EXP_DEVCTL_EXT_TAG;
+               t4_os_pci_write_cfg2(adapter, pos + PCI_EXP_DEVCTL, v);
+               if (is_t6(adapter->params.chip)) {
+                       t4_set_reg_field(adapter, A_PCIE_CFG2,
+                                        V_T6_TOTMAXTAG(M_T6_TOTMAXTAG),
+                                        V_T6_TOTMAXTAG(7));
+                       t4_set_reg_field(adapter, A_PCIE_CMD_CFG,
+                                        V_T6_MINTAG(M_T6_MINTAG),
+                                        V_T6_MINTAG(8));
+               } else {
+                       t4_set_reg_field(adapter, A_PCIE_CFG2,
+                                        V_TOTMAXTAG(M_TOTMAXTAG),
+                                        V_TOTMAXTAG(3));
+                       t4_set_reg_field(adapter, A_PCIE_CMD_CFG,
+                                        V_MINTAG(M_MINTAG),
+                                        V_MINTAG(8));
+               }
+       }
+}
+
 /*
  * Tweak configuration based on system architecture, etc.  Most of these have
  * defaults assigned to them by Firmware Configuration Files (if we're using
@@ -445,6 +475,9 @@ static int adap_init0_tweaks(struct adapter *adapter)
                         V_CREDITCNT(M_CREDITCNT) | M_CREDITCNTPACKING,
                         V_CREDITCNT(3) | V_CREDITCNTPACKING(1));
 
+       t4_set_reg_field(adapter, A_SGE_INGRESS_RX_THRESHOLD,
+                        V_THRESHOLD_3(M_THRESHOLD_3), V_THRESHOLD_3(32U));
+
        t4_set_reg_field(adapter, A_SGE_CONTROL2, V_IDMAARBROUNDROBIN(1U),
                         V_IDMAARBROUNDROBIN(1U));
 
@@ -593,7 +626,7 @@ static int adap_init0_config(struct adapter *adapter, int reset)
        /*
         * Return successfully and note that we're operating with parameters
         * not supplied by the driver, rather than from hard-wired
-        * initialization constants burried in the driver.
+        * initialization constants buried in the driver.
         */
        dev_info(adapter,
                 "Successfully configured using Firmware Configuration File \"%s\", version %#x, computed checksum %#x\n",
@@ -796,6 +829,7 @@ static int adap_init0(struct adapter *adap)
        }
        t4_init_sge_params(adap);
        t4_init_tp_params(adap);
+       configure_pcie_ext_tag(adap);
 
        adap->params.drv_memwin = MEMWIN_NIC;
        adap->flags |= FW_OK;
@@ -981,33 +1015,22 @@ int setup_rss(struct port_info *pi)
 /*
  * Enable NAPI scheduling and interrupt generation for all Rx queues.
  */
-static void enable_rx(struct adapter *adap)
+static void enable_rx(struct adapter *adap, struct sge_rspq *q)
 {
-       struct sge *s = &adap->sge;
-       struct sge_rspq *q = &s->fw_evtq;
-       int i, j;
-
        /* 0-increment GTS to start the timer and enable interrupts */
        t4_write_reg(adap, MYPF_REG(A_SGE_PF_GTS),
                     V_SEINTARM(q->intr_params) |
                     V_INGRESSQID(q->cntxt_id));
+}
 
-       for_each_port(adap, i) {
-               const struct port_info *pi = &adap->port[i];
-               struct rte_eth_dev *eth_dev = pi->eth_dev;
-
-               for (j = 0; j < eth_dev->data->nb_rx_queues; j++) {
-                       q = eth_dev->data->rx_queues[j];
-
-                       /*
-                        * 0-increment GTS to start the timer and enable
-                        * interrupts
-                        */
-                       t4_write_reg(adap, MYPF_REG(A_SGE_PF_GTS),
-                                    V_SEINTARM(q->intr_params) |
-                                    V_INGRESSQID(q->cntxt_id));
-               }
-       }
+void cxgbe_enable_rx_queues(struct port_info *pi)
+{
+       struct adapter *adap = pi->adapter;
+       struct sge *s = &adap->sge;
+       unsigned int i;
+
+       for (i = 0; i < pi->n_rx_qsets; i++)
+               enable_rx(adap, &s->ethrxq[pi->first_qset + i].rspq);
 }
 
 /**
@@ -1020,7 +1043,7 @@ static void enable_rx(struct adapter *adap)
  */
 int cxgbe_up(struct adapter *adap)
 {
-       enable_rx(adap);
+       enable_rx(adap, &adap->sge.fw_evtq);
        t4_sge_tx_monitor_start(adap);
        t4_intr_enable(adap);
        adap->flags |= FULL_INIT_DONE;