cxgbe: optimize forwarding performance for 40G

[dpdk.git] / drivers / net / cxgbe / sge.c

diff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c
index b737183..69ab487 100644 (file)
--- a/drivers/net/cxgbe/sge.c
+++ b/drivers/net/cxgbe/sge.c
@@ -31,7 +31,6 @@
  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <linux/if_ether.h>
 #include <sys/queue.h>
 #include <stdio.h>
 #include <errno.h>
@@ -98,7 +97,8 @@ static inline unsigned int fl_mtu_bufsize(struct adapter *adapter,
 {
        struct sge *s = &adapter->sge;
 
-       return ALIGN(s->pktshift + ETH_HLEN + VLAN_HLEN + mtu, s->fl_align);
+       return CXGBE_ALIGN(s->pktshift + ETHER_HDR_LEN + VLAN_HLEN + mtu,
+                          s->fl_align);
 }
 
 #define FL_MTU_SMALL_BUFSIZE(adapter) fl_mtu_bufsize(adapter, FL_MTU_SMALL)
@@ -286,8 +286,7 @@ static void unmap_rx_buf(struct sge_fl *q)
 
 static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q)
 {
-       /* see if we have exceeded q->size / 4 */
-       if (q->pend_cred >= (q->size / 4)) {
+       if (q->pend_cred >= 64) {
                u32 val = adap->params.arch.sge_fl_db;
 
                if (is_t4(adap->params.chip))
@@ -1054,7 +1053,6 @@ out_free:
                return 0;
        }
 
-       rte_prefetch0(&((&txq->q)->sdesc->mbuf->pool));
        pi = (struct port_info *)txq->eth_dev->data->dev_private;
        adap = pi->adapter;
 
@@ -1070,6 +1068,7 @@ out_free:
                                txq->stats.mapping_err++;
                                goto out_free;
                        }
+                       rte_prefetch0((volatile void *)addr);
                        return tx_do_packet_coalesce(txq, mbuf, cflits, adap,
                                                     pi, addr);
                } else {
@@ -1299,14 +1298,14 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
 
        mbuf->port = pkt->iff;
        if (pkt->l2info & htonl(F_RXF_IP)) {
-               mbuf->ol_flags |= PKT_RX_IPV4_HDR;
+               mbuf->packet_type = RTE_PTYPE_L3_IPV4;
                if (unlikely(!csum_ok))
                        mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 
                if ((pkt->l2info & htonl(F_RXF_UDP | F_RXF_TCP)) && !csum_ok)
                        mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
        } else if (pkt->l2info & htonl(F_RXF_IP6)) {
-               mbuf->ol_flags |= PKT_RX_IPV6_HDR;
+               mbuf->packet_type = RTE_PTYPE_L3_IPV6;
        }
 
        mbuf->port = pkt->iff;
@@ -1411,7 +1410,7 @@ static int process_responses(struct sge_rspq *q, int budget,
                        unmap_rx_buf(&rxq->fl);
 
                        if (cpl->l2info & htonl(F_RXF_IP)) {
-                               pkt->ol_flags |= PKT_RX_IPV4_HDR;
+                               pkt->packet_type = RTE_PTYPE_L3_IPV4;
                                if (unlikely(!csum_ok))
                                        pkt->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 
@@ -1419,7 +1418,7 @@ static int process_responses(struct sge_rspq *q, int budget,
                                     htonl(F_RXF_UDP | F_RXF_TCP)) && !csum_ok)
                                        pkt->ol_flags |= PKT_RX_L4_CKSUM_BAD;
                        } else if (cpl->l2info & htonl(F_RXF_IP6)) {
-                               pkt->ol_flags |= PKT_RX_IPV6_HDR;
+                               pkt->packet_type = RTE_PTYPE_L3_IPV6;
                        }
 
                        if (!rss_hdr->filter_tid && rss_hdr->hash_type) {
@@ -1454,7 +1453,8 @@ static int process_responses(struct sge_rspq *q, int budget,
                        unsigned int params;
                        u32 val;
 
-                       __refill_fl(q->adapter, &rxq->fl);
+                       if (fl_cap(&rxq->fl) - rxq->fl.avail >= 64)
+                               __refill_fl(q->adapter, &rxq->fl);
                        params = V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX);
                        q->next_intr_params = params;
                        val = V_CIDXINC(cidx_inc) | V_SEINTARM(params);
@@ -1562,7 +1562,7 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
        unsigned int nb_refill;
 
        /* Size needs to be multiple of 16, including status entry. */
-       iq->size = roundup(iq->size, 16);
+       iq->size = cxgbe_roundup(iq->size, 16);
 
        snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
                 eth_dev->driver->pci_drv.name, fwevtq ? "fwq_ring" : "rx_ring",
@@ -1614,7 +1614,7 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
                 */
                if (fl->size < s->fl_starve_thres - 1 + 2 * 8)
                        fl->size = s->fl_starve_thres - 1 + 2 * 8;
-               fl->size = roundup(fl->size, 8);
+               fl->size = cxgbe_roundup(fl->size, 8);
 
                snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
                         eth_dev->driver->pci_drv.name,
@@ -2048,7 +2048,7 @@ static int t4_sge_init_soft(struct adapter *adap)
         * The Page Size Buffer must be exactly equal to our Page Size and the
         * Large Page Size Buffer should be 0 (per above) or a power of 2.
         */
-       if (fl_small_pg != PAGE_SIZE ||
+       if (fl_small_pg != CXGBE_PAGE_SIZE ||
            (fl_large_pg & (fl_large_pg - 1)) != 0) {
                dev_err(adap, "bad SGE FL page buffer sizes [%d, %d]\n",
                        fl_small_pg, fl_large_pg);