u16 pfvf;
u16 hw_idx;
u8 src_mac[RTE_ETHER_ADDR_LEN];
- rte_atomic32_t refcnt;
+ u32 refcnt;
rte_spinlock_t lock;
};
void cxgbe_do_smt_write_rpl(struct adapter *adap,
const struct cpl_smt_write_rpl *rpl);
struct smt_entry *cxgbe_smt_alloc_switching(struct rte_eth_dev *dev, u8 *smac);
+void cxgbe_smt_release(struct smt_entry *e);
#endif /* __CXGBE_SMT_H_ */