common/sfc_efx/base: implement Tx control path for Riverhead

[dpdk.git] / drivers / net / dpaa2 / dpaa2_ethdev.c

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 12b8811..02daa4d 100644 (file)
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -241,8 +241,6 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 
        PMD_INIT_FUNC_TRACE();
 
-       dev_info->if_index = priv->hw_id;
-
        dev_info->max_mac_addrs = priv->max_mac_filters;
        dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
        dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
@@ -677,6 +675,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
        dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
        dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
        dpaa2_q->bp_array = rte_dpaa2_bpid_info;
+       dpaa2_q->nb_desc = UINT16_MAX;
+       dpaa2_q->offloads = rx_conf->offloads;
 
        /*Get the flow id from given VQ id*/
        flow_id = dpaa2_q->flow_id;
@@ -729,7 +729,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
                struct dpni_taildrop taildrop;
 
                taildrop.enable = 1;
-
+               dpaa2_q->nb_desc = nb_rx_desc;
                /* Private CGR will use tail drop length as nb_rx_desc.
                 * for rest cases we can use standard byte based tail drop.
                 * There is no HW restriction, but number of CGRs are limited,
@@ -793,7 +793,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 static int
 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
                         uint16_t tx_queue_id,
-                        uint16_t nb_tx_desc __rte_unused,
+                        uint16_t nb_tx_desc,
                         unsigned int socket_id __rte_unused,
                         const struct rte_eth_txconf *tx_conf)
 {
@@ -819,6 +819,9 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
                return -EINVAL;
        }
 
+       dpaa2_q->nb_desc = UINT16_MAX;
+       dpaa2_q->offloads = tx_conf->offloads;
+
        /* Return if queue already configured */
        if (dpaa2_q->flow_id != 0xffff) {
                dev->data->tx_queues[tx_queue_id] = dpaa2_q;
@@ -872,12 +875,14 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
        if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
                struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 
+               dpaa2_q->nb_desc = nb_tx_desc;
+
                cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
-               cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
+               cong_notif_cfg.threshold_entry = nb_tx_desc;
                /* Notify that the queue is not congested when the data in
                 * the queue is below this thershold.
                 */
-               cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
+               cong_notif_cfg.threshold_exit = nb_tx_desc - 24;
                cong_notif_cfg.message_ctx = 0;
                cong_notif_cfg.message_iova =
                                (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
@@ -1058,8 +1063,7 @@ dpaa2_interrupt_handler(void *param)
                clear = DPNI_IRQ_EVENT_LINK_CHANGED;
                dpaa2_dev_link_update(dev, 0);
                /* calling all the apps registered for link status event */
-               _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
-                                             NULL);
+               rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
        }
 out:
        ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
@@ -2255,6 +2259,43 @@ dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
        return ret;
 }
 
+static void
+dpaa2_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+       struct rte_eth_rxq_info *qinfo)
+{
+       struct dpaa2_queue *rxq;
+
+       rxq = (struct dpaa2_queue *)dev->data->rx_queues[queue_id];
+
+       qinfo->mp = rxq->mb_pool;
+       qinfo->scattered_rx = dev->data->scattered_rx;
+       qinfo->nb_desc = rxq->nb_desc;
+
+       qinfo->conf.rx_free_thresh = 1;
+       qinfo->conf.rx_drop_en = 1;
+       qinfo->conf.rx_deferred_start = 0;
+       qinfo->conf.offloads = rxq->offloads;
+}
+
+static void
+dpaa2_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+       struct rte_eth_txq_info *qinfo)
+{
+       struct dpaa2_queue *txq;
+
+       txq = dev->data->tx_queues[queue_id];
+
+       qinfo->nb_desc = txq->nb_desc;
+       qinfo->conf.tx_thresh.pthresh = 0;
+       qinfo->conf.tx_thresh.hthresh = 0;
+       qinfo->conf.tx_thresh.wthresh = 0;
+
+       qinfo->conf.tx_free_thresh = 0;
+       qinfo->conf.tx_rs_thresh = 0;
+       qinfo->conf.offloads = txq->offloads;
+       qinfo->conf.tx_deferred_start = 0;
+}
+
 static struct eth_dev_ops dpaa2_ethdev_ops = {
        .dev_configure    = dpaa2_eth_dev_configure,
        .dev_start            = dpaa2_dev_start,
@@ -2287,7 +2328,6 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
        .tx_queue_release  = dpaa2_dev_tx_queue_release,
        .rx_burst_mode_get = dpaa2_dev_rx_burst_mode_get,
        .tx_burst_mode_get = dpaa2_dev_tx_burst_mode_get,
-       .rx_queue_count       = dpaa2_dev_rx_queue_count,
        .flow_ctrl_get        = dpaa2_flow_ctrl_get,
        .flow_ctrl_set        = dpaa2_flow_ctrl_set,
        .mac_addr_add         = dpaa2_dev_add_mac_addr,
@@ -2296,6 +2336,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
        .rss_hash_update      = dpaa2_dev_rss_hash_update,
        .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
        .filter_ctrl          = dpaa2_dev_flow_ctrl,
+       .rxq_info_get         = dpaa2_rxq_info_get,
+       .txq_info_get         = dpaa2_txq_info_get,
 #if defined(RTE_LIBRTE_IEEE1588)
        .timesync_enable      = dpaa2_timesync_enable,
        .timesync_disable     = dpaa2_timesync_disable,
@@ -2440,6 +2482,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
                 * plugged.
                 */
                eth_dev->dev_ops = &dpaa2_ethdev_ops;
+               eth_dev->rx_queue_count = dpaa2_dev_rx_queue_count;
                if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
                        eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
                else if (dpaa2_get_devargs(dev->devargs,