dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
+ if (dpaa2_svr_family == SVR_LX2160A) {
+ dev_info->speed_capa |= ETH_LINK_SPEED_25G |
+ ETH_LINK_SPEED_40G |
+ ETH_LINK_SPEED_50G |
+ ETH_LINK_SPEED_100G;
+ }
+
return 0;
}
DPNI_CP_CONGESTION_GROUP,
DPNI_QUEUE_RX,
dpaa2_q->tc_index,
- flow_id, &taildrop);
+ dpaa2_q->cgid, &taildrop);
} else {
/*enabling per rx queue congestion control */
taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
dpaa2_q->tc_index,
- flow_id, &taildrop);
+ dpaa2_q->cgid, &taildrop);
} else {
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_QUEUE, DPNI_QUEUE_RX,
DPAA2_PMD_ERR("Memory allocation failed for dpni device");
return -1;
}
- dpni_dev->regs = rte_mcp_ptr_list[0];
+ dpni_dev->regs = dpaa2_get_mcp_ptr(MC_PORTAL_INDEX);
eth_dev->process_private = (void *)dpni_dev;
/* For secondary processes, the primary has done all the work */