* BSD LICENSE
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright (c) 2016 NXP. All rights reserved.
+ * Copyright 2016 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
#include <dpaa2_hw_pvt.h>
#include <dpaa2_hw_mempool.h>
#include <dpaa2_hw_dpio.h>
-
+#include <mc/fsl_dpmng.h>
#include "dpaa2_ethdev.h"
static struct rte_dpaa2_driver rte_dpaa2_pmd;
}
}
+static int
+dpaa2_fw_version_get(struct rte_eth_dev *dev,
+ char *fw_version,
+ size_t fw_size)
+{
+ int ret;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = priv->hw;
+ struct mc_soc_version mc_plat_info = {0};
+ struct mc_version mc_ver_info = {0};
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
+ RTE_LOG(WARNING, PMD, "\tmc_get_soc_version failed\n");
+
+ if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
+ RTE_LOG(WARNING, PMD, "\tmc_get_version failed\n");
+
+ ret = snprintf(fw_version, fw_size,
+ "%x-%d.%d.%d",
+ mc_plat_info.svr,
+ mc_ver_info.major,
+ mc_ver_info.minor,
+ mc_ver_info.revision);
+
+ ret += 1; /* add the size of '\0' */
+ if (fw_size < (uint32_t)ret)
+ return ret;
+ else
+ return 0;
+}
+
static void
dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
{
}
vq_id = 0;
- for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
- dist_idx++) {
+ for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
mcq->tc_index = DPAA2_DEF_TC;
mcq->flow_id = dist_idx;
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct mc_soc_version mc_plat_info = {0};
struct dpaa2_queue *dpaa2_q;
struct dpni_queue cfg;
uint8_t options = 0;
dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
- /*Get the tc id and flow id from given VQ id*/
- flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
+ /*Get the flow id from given VQ id*/
+ flow_id = rx_queue_id % priv->nb_rx_queues;
memset(&cfg, 0, sizeof(struct dpni_queue));
options = options | DPNI_QUEUE_OPT_USER_CTX;
cfg.user_context = (uint64_t)(dpaa2_q);
/*if ls2088 or rev2 device, enable the stashing */
- if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
+
+ if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
+ PMD_INIT_LOG(ERR, "\tmc_get_soc_version failed\n");
+
+ if ((mc_plat_info.svr & 0xffff0000) != SVR_LS2080A) {
options |= DPNI_QUEUE_OPT_FLC;
cfg.flc.stash_control = true;
cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
- if (priv->num_tc == 1) {
- tc_id = 0;
- flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
- } else {
- tc_id = tx_queue_id;
- flow_id = 0;
- }
+ tc_id = tx_queue_id;
+ flow_id = 0;
ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
tc_id, flow_id, options, &tx_flow_cfg);
if (priv->flags & DPAA2_TX_CGR_SUPPORT) {
struct dpni_congestion_notification_cfg cong_notif_cfg;
- cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
- /* Notify about congestion when the queue size is 32 KB */
+ cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
/* Notify that the queue is not congested when the data in
* the queue is below this thershold.
*/
cfg.options |= DPNI_LINK_OPT_PAUSE;
cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
+ break;
case RTE_FC_TX_PAUSE:
/* Enable RX flow control
* OPT_PAUSE not set;
.link_update = dpaa2_dev_link_update,
.stats_get = dpaa2_dev_stats_get,
.stats_reset = dpaa2_dev_stats_reset,
+ .fw_version_get = dpaa2_fw_version_get,
.dev_infos_get = dpaa2_dev_info_get,
.dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
.mtu_set = dpaa2_dev_mtu_set,
struct dpni_attr attr;
struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
struct dpni_buffer_layout layout;
- int i, ret, hw_id;
+ int ret, hw_id;
PMD_INIT_FUNC_TRACE();
}
priv->num_tc = attr.num_tcs;
- for (i = 0; i < attr.num_tcs; i++) {
- priv->num_dist_per_tc[i] = attr.num_queues;
- break;
- }
- /* Distribution is per Tc only,
- * so choosing RX queues from default TC only
+ /* Resetting the "num_rx_vqueues" to equal number of queues in first TC
+ * as only one TC is supported on Rx Side. Once Multiple TCs will be
+ * in use for Rx processing then this will be changed or removed.
*/
- priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
+ priv->nb_rx_queues = attr.num_queues;
- if (attr.num_tcs == 1)
- priv->nb_tx_queues = attr.num_queues;
- else
- priv->nb_tx_queues = attr.num_tcs;
+ /* TODO:Using hard coded value for number of TX queues due to dependency
+ * in MC.
+ */
+ priv->nb_tx_queues = 8;
- PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
+ PMD_INIT_LOG(DEBUG, "num TC - RX %d", priv->num_tc);
+ PMD_INIT_LOG(DEBUG, "nb_tx_queues %d", priv->nb_tx_queues);
PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
priv->hw = dpni_dev;
priv->max_vlan_filters = attr.vlan_filter_entries;
priv->flags = 0;
- priv->flags |= DPAA2_TX_CGR_SUPPORT;
- PMD_INIT_LOG(INFO, "Enable the tx congestion control support");
-
/* Allocate memory for hardware structure for queues */
ret = dpaa2_alloc_rx_tx_queues(eth_dev);
if (ret) {
}
eth_dev->dev_ops = &dpaa2_ethdev_ops;
- eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
eth_dev->tx_pkt_burst = dpaa2_dev_tx;
}
static int
-rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
+rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
struct rte_dpaa2_device *dpaa2_dev)
{
struct rte_eth_dev *eth_dev;
- char ethdev_name[RTE_ETH_NAME_MAX_LEN];
-
int diag;
- sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
-
- eth_dev = rte_eth_dev_allocate(ethdev_name);
+ eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
if (eth_dev == NULL)
return -ENOMEM;
}
}
eth_dev->device = &dpaa2_dev->device;
+ eth_dev->device->driver = &dpaa2_drv->driver;
+
dpaa2_dev->eth_dev = eth_dev;
eth_dev->data->rx_mbuf_alloc_failed = 0;