#include <dpaa2_hw_dpio.h>
#include <mc/fsl_dpmng.h>
#include "dpaa2_ethdev.h"
+#include "dpaa2_sparser.h"
#include <fsl_qbman_debug.h>
#define DRIVER_LOOPBACK_MODE "drv_loopback"
/* Rx offloads which cannot be disabled */
static uint64_t dev_rx_offloads_nodis =
+ DEV_RX_OFFLOAD_RSS_HASH |
DEV_RX_OFFLOAD_SCATTER;
/* Supported Tx offloads */
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
PMD_INIT_FUNC_TRACE();
}
if (on)
- ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
- priv->token, vlan_id);
+ ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, priv->token,
+ vlan_id, 0, 0, 0);
else
ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
priv->token, vlan_id);
dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
int ret;
PMD_INIT_FUNC_TRACE();
uint16_t tpid)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
int ret = -ENOTSUP;
PMD_INIT_FUNC_TRACE();
size_t fw_size)
{
int ret;
- struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
struct mc_soc_version mc_plat_info = {0};
struct mc_version mc_ver_info = {0};
dev_info->max_vmdq_pools = ETH_16_POOLS;
dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
+ dev_info->default_rxportconf.burst_size = dpaa2_dqrr_size;
+ /* same is rx size for best perf */
+ dev_info->default_txportconf.burst_size = dpaa2_dqrr_size;
+
+ dev_info->default_rxportconf.nb_queues = 1;
+ dev_info->default_txportconf.nb_queues = 1;
+ dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
+ dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
+
return 0;
}
dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
uint64_t rx_offloads = eth_conf->rxmode.offloads;
uint64_t tx_offloads = eth_conf->txmode.offloads;
if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
- /* update the current status */
- dpaa2_dev_link_update(dev, 0);
-
return 0;
}
struct rte_mempool *mb_pool)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct dpaa2_queue *dpaa2_q;
struct dpni_queue cfg;
uint8_t options = 0;
DPNI_CP_CONGESTION_GROUP,
DPNI_QUEUE_RX,
dpaa2_q->tc_index,
- flow_id, &taildrop);
+ dpaa2_q->cgid, &taildrop);
} else {
/*enabling per rx queue congestion control */
taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
dpaa2_q->tc_index,
- flow_id, &taildrop);
+ dpaa2_q->cgid, &taildrop);
} else {
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_QUEUE, DPNI_QUEUE_RX,
priv->tx_vq[tx_queue_id];
struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
priv->tx_conf_vq[tx_queue_id];
- struct fsl_mc_io *dpni = priv->hw;
+ struct fsl_mc_io *dpni = dev->process_private;
struct dpni_queue tx_conf_cfg;
struct dpni_queue tx_flow_cfg;
uint8_t options = 0, flow_id;
{
struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni =
+ (struct fsl_mc_io *)priv->eth_dev->process_private;
uint8_t options = 0;
int ret;
struct dpni_queue cfg;
struct qbman_fq_query_np_rslt state;
uint32_t frame_cnt = 0;
- PMD_INIT_FUNC_TRACE();
-
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return -EINVAL;
}
}
if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
frame_cnt = qbman_fq_state_frame_count(&state);
- DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
+ DPAA2_PMD_DP_DEBUG("RX frame count for q(%d) is %u",
rx_queue_id, frame_cnt);
}
return frame_cnt;
{
struct rte_eth_dev *dev = param;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int ret;
int irq_index = DPNI_IRQ_INDEX;
unsigned int status = 0, clear = 0;
{
int err = 0;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int irq_index = DPNI_IRQ_INDEX;
unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
struct rte_dpaa2_device *dpaa2_dev;
struct rte_eth_dev_data *data = dev->data;
struct dpaa2_dev_priv *priv = data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct dpni_queue cfg;
struct dpni_error_cfg err_cfg;
uint16_t qdid;
dpaa2_dev_stop(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int ret;
struct rte_eth_link link;
struct rte_intr_handle *intr_handle = dev->intr_handle;
dpaa2_dev_close(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int ret;
struct rte_eth_link link;
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
+ VLAN_TAG_SIZE;
return -EINVAL;
if (frame_size > RTE_ETHER_MAX_LEN)
- dev->data->dev_conf.rxmode.offloads &=
+ dev->data->dev_conf.rxmode.offloads |=
DEV_RX_OFFLOAD_JUMBO_FRAME;
else
dev->data->dev_conf.rxmode.offloads &=
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
return -1;
}
- ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
- priv->token, addr->addr_bytes);
+ ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, priv->token,
+ addr->addr_bytes, 0, 0, 0);
if (ret)
DPAA2_PMD_ERR(
"error: Adding the MAC ADDR failed: err = %d", ret);
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct rte_eth_dev_data *data = dev->data;
struct rte_ether_addr *macaddr;
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
PMD_INIT_FUNC_TRACE();
struct rte_eth_stats *stats)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int32_t retcode;
uint8_t page0 = 0, page1 = 1, page2 = 2;
union dpni_statistics value;
unsigned int n)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int32_t retcode;
union dpni_statistics value[5] = {};
unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
if (!ids) {
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni =
+ (struct fsl_mc_io *)dev->process_private;
int32_t retcode;
union dpni_statistics value[5] = {};
dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
int retcode;
int i;
struct dpaa2_queue *dpaa2_q;
{
int ret;
struct dpaa2_dev_priv *priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct rte_eth_link link;
struct dpni_link_state state = {0};
struct dpni_link_state state = {0};
priv = dev->data->dev_private;
- dpni = (struct fsl_mc_io *)priv->hw;
+ dpni = (struct fsl_mc_io *)dev->process_private;
if (dpni == NULL) {
DPAA2_PMD_ERR("dpni is NULL");
/* changing tx burst function to start enqueues */
dev->tx_pkt_burst = dpaa2_dev_tx;
dev->data->dev_link.link_status = state.up;
+ dev->data->dev_link.link_speed = state.rate;
if (state.up)
DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
PMD_INIT_FUNC_TRACE();
priv = dev->data->dev_private;
- dpni = (struct fsl_mc_io *)priv->hw;
+ dpni = (struct fsl_mc_io *)dev->process_private;
if (dpni == NULL) {
DPAA2_PMD_ERR("Device has not yet been configured");
PMD_INIT_FUNC_TRACE();
priv = dev->data->dev_private;
- dpni = (struct fsl_mc_io *)priv->hw;
+ dpni = (struct fsl_mc_io *)dev->process_private;
if (dpni == NULL || fc_conf == NULL) {
DPAA2_PMD_ERR("device not configured");
PMD_INIT_FUNC_TRACE();
priv = dev->data->dev_private;
- dpni = (struct fsl_mc_io *)priv->hw;
+ dpni = (struct fsl_mc_io *)dev->process_private;
if (dpni == NULL) {
DPAA2_PMD_ERR("dpni is NULL");
int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
int eth_rx_queue_id,
- uint16_t dpcon_id,
+ struct dpaa2_dpcon_dev *dpcon,
const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
{
struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
uint8_t flow_id = dpaa2_ethq->flow_id;
struct dpni_queue cfg;
- uint8_t options;
+ uint8_t options, priority;
int ret;
if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
else
return -EINVAL;
+ priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) *
+ (dpcon->num_priorities - 1);
+
memset(&cfg, 0, sizeof(struct dpni_queue));
options = DPNI_QUEUE_OPT_DEST;
cfg.destination.type = DPNI_DEST_DPCON;
- cfg.destination.id = dpcon_id;
- cfg.destination.priority = queue_conf->ev.priority;
+ cfg.destination.id = dpcon->dpcon_id;
+ cfg.destination.priority = priority;
if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
int eth_rx_queue_id)
{
struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
uint8_t flow_id = dpaa2_ethq->flow_id;
struct dpni_queue cfg;
.rss_hash_update = dpaa2_dev_rss_hash_update,
.rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
.filter_ctrl = dpaa2_dev_flow_ctrl,
+#if defined(RTE_LIBRTE_IEEE1588)
+ .timesync_enable = dpaa2_timesync_enable,
+ .timesync_disable = dpaa2_timesync_disable,
+ .timesync_read_time = dpaa2_timesync_read_time,
+ .timesync_write_time = dpaa2_timesync_write_time,
+ .timesync_adjust_time = dpaa2_timesync_adjust_time,
+ .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
+ .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
+#endif
};
/* Populate the mac address from physically available (u-boot/firmware) and/or
PMD_INIT_FUNC_TRACE();
+ dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
+ if (!dpni_dev) {
+ DPAA2_PMD_ERR("Memory allocation failed for dpni device");
+ return -1;
+ }
+ dpni_dev->regs = rte_mcp_ptr_list[0];
+ eth_dev->process_private = (void *)dpni_dev;
+
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
/* In case of secondary, only burst and ops API need to be
dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
hw_id = dpaa2_dev->object_id;
-
- dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
- if (!dpni_dev) {
- DPAA2_PMD_ERR("Memory allocation failed for dpni device");
- return -1;
- }
-
- dpni_dev->regs = rte_mcp_ptr_list[0];
ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
if (ret) {
DPAA2_PMD_ERR(
goto init_err;
}
+ /*TODO To enable soft parser support DPAA2 driver needs to integrate
+ * with external entity to receive byte code for software sequence
+ * and same will be offload to the H/W using MC interface.
+ * Currently it is assumed that DPAA2 driver has byte code by some
+ * mean and same if offloaded to H/W.
+ */
+ if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
+ WRIOP_SS_INITIALIZER(priv);
+ ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
+ if (ret < 0) {
+ DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
+ ret);
+ return ret;
+ }
+
+ ret = dpaa2_eth_enable_wriop_soft_parser(priv,
+ DPNI_SS_INGRESS);
+ if (ret < 0) {
+ DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
+ ret);
+ return ret;
+ }
+ }
RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
return 0;
init_err:
dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
{
struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
- struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
int i, ret;
PMD_INIT_FUNC_TRACE();
/* Free the allocated memory for ethernet private data and dpni*/
priv->hw = NULL;
+ eth_dev->process_private = NULL;
rte_free(dpni);
for (i = 0; i < MAX_TCS; i++) {
struct rte_dpaa2_device *dpaa2_dev)
{
struct rte_eth_dev *eth_dev;
- struct dpaa2_dev_priv *priv;
+ struct dpaa2_dev_priv *dev_priv;
int diag;
if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
if (!eth_dev)
return -ENODEV;
- eth_dev->data->dev_private = rte_zmalloc(
- "ethdev private structure",
- sizeof(struct dpaa2_dev_priv),
- RTE_CACHE_LINE_SIZE);
- if (eth_dev->data->dev_private == NULL) {
+ dev_priv = rte_zmalloc("ethdev private structure",
+ sizeof(struct dpaa2_dev_priv),
+ RTE_CACHE_LINE_SIZE);
+ if (dev_priv == NULL) {
DPAA2_PMD_CRIT(
"Unable to allocate memory for private data");
rte_eth_dev_release_port(eth_dev);
return -ENOMEM;
}
+ eth_dev->data->dev_private = (void *)dev_priv;
+ /* Store a pointer to eth_dev in dev_private */
+ dev_priv->eth_dev = eth_dev;
+ dev_priv->tx_conf_en = 0;
} else {
eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
- if (!eth_dev)
+ if (!eth_dev) {
+ DPAA2_PMD_DEBUG("returning enodev");
return -ENODEV;
+ }
}
eth_dev->device = &dpaa2_dev->device;
return 0;
}
- priv = eth_dev->data->dev_private;
- priv->tx_conf_en = 0;
-
rte_eth_dev_release_port(eth_dev);
return diag;
}
git.droids-corp.org / dpdk.git / blobdiff