/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2018 NXP
+ * Copyright 2016-2020 NXP
*
*/
#include "dpaa2_ethdev.h"
#include "base/dpaa2_hw_dpni_annot.h"
-static inline uint32_t __attribute__((hot))
+static inline uint32_t __rte_hot
dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
struct dpaa2_annot_hdr *annotation);
+static void enable_tx_tstamp(struct qbman_fd *fd) __rte_unused;
+
#define DPAA2_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) do { \
DPAA2_SET_FD_ADDR(_fd, DPAA2_MBUF_VADDR_TO_IOVA(_mbuf)); \
DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \
DPAA2_RESET_FD_FLC(_fd); \
} while (0)
-static inline void __attribute__((hot))
-dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd)
+static inline void __rte_hot
+dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd,
+ void *hw_annot_addr)
{
- struct dpaa2_annot_hdr *annotation;
uint16_t frc = DPAA2_GET_FD_FRC_PARSE_SUM(fd);
+ struct dpaa2_annot_hdr *annotation =
+ (struct dpaa2_annot_hdr *)hw_annot_addr;
m->packet_type = RTE_PTYPE_UNKNOWN;
switch (frc) {
RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP;
break;
default:
- m->packet_type = dpaa2_dev_rx_parse_slow(m,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ m->packet_type = dpaa2_dev_rx_parse_slow(m, annotation);
}
m->hash.rss = fd->simple.flc_hi;
m->ol_flags |= PKT_RX_RSS_HASH;
- if (dpaa2_enable_ts == PMD_DPAA2_ENABLE_TS) {
- annotation = (struct dpaa2_annot_hdr *)
- ((size_t)DPAA2_IOVA_TO_VADDR(
- DPAA2_GET_FD_ADDR(fd)) + DPAA2_FD_PTA_SIZE);
+ if (dpaa2_enable_ts[m->port]) {
m->timestamp = annotation->word2;
m->ol_flags |= PKT_RX_TIMESTAMP;
DPAA2_PMD_DP_DEBUG("pkt timestamp:0x%" PRIx64 "", m->timestamp);
frc, m->packet_type, m->ol_flags);
}
-static inline uint32_t __attribute__((hot))
+static inline uint32_t __rte_hot
dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
struct dpaa2_annot_hdr *annotation)
{
"(4)=0x%" PRIx64 "\t",
annotation->word3, annotation->word4);
+#if defined(RTE_LIBRTE_IEEE1588)
+ if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP))
+ mbuf->ol_flags |= PKT_RX_IEEE1588_PTP;
+#endif
+
if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
(VLAN_TCI_OFFSET_1(annotation->word5) >> 16));
return pkt_type;
}
-static inline uint32_t __attribute__((hot))
+static inline uint32_t __rte_hot
dpaa2_dev_rx_parse(struct rte_mbuf *mbuf, void *hw_annot_addr)
{
struct dpaa2_annot_hdr *annotation =
return dpaa2_dev_rx_parse_slow(mbuf, annotation);
}
-static inline struct rte_mbuf *__attribute__((hot))
-eth_sg_fd_to_mbuf(const struct qbman_fd *fd)
+static inline struct rte_mbuf *__rte_hot
+eth_sg_fd_to_mbuf(const struct qbman_fd *fd,
+ int port_id)
{
struct qbman_sge *sgt, *sge;
size_t sg_addr, fd_addr;
int i = 0;
+ void *hw_annot_addr;
struct rte_mbuf *first_seg, *next_seg, *cur_seg, *temp;
fd_addr = (size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
+ hw_annot_addr = (void *)(fd_addr + DPAA2_FD_PTA_SIZE);
/* Get Scatter gather table address */
sgt = (struct qbman_sge *)(fd_addr + DPAA2_GET_FD_OFFSET(fd));
first_seg->pkt_len = DPAA2_GET_FD_LEN(fd);
first_seg->nb_segs = 1;
first_seg->next = NULL;
+ first_seg->port = port_id;
if (dpaa2_svr_family == SVR_LX2160A)
- dpaa2_dev_rx_parse_new(first_seg, fd);
+ dpaa2_dev_rx_parse_new(first_seg, fd, hw_annot_addr);
else
- first_seg->packet_type = dpaa2_dev_rx_parse(first_seg,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ first_seg->packet_type =
+ dpaa2_dev_rx_parse(first_seg, hw_annot_addr);
rte_mbuf_refcnt_set(first_seg, 1);
cur_seg = first_seg;
return (void *)first_seg;
}
-static inline struct rte_mbuf *__attribute__((hot))
-eth_fd_to_mbuf(const struct qbman_fd *fd)
+static inline struct rte_mbuf *__rte_hot
+eth_fd_to_mbuf(const struct qbman_fd *fd,
+ int port_id)
{
- struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
- DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
+ void *v_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
+ void *hw_annot_addr = (void *)((size_t)v_addr + DPAA2_FD_PTA_SIZE);
+ struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(v_addr,
rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
/* need to repopulated some of the fields,
mbuf->data_off = DPAA2_GET_FD_OFFSET(fd);
mbuf->data_len = DPAA2_GET_FD_LEN(fd);
mbuf->pkt_len = mbuf->data_len;
+ mbuf->port = port_id;
mbuf->next = NULL;
rte_mbuf_refcnt_set(mbuf, 1);
*/
if (dpaa2_svr_family == SVR_LX2160A)
- dpaa2_dev_rx_parse_new(mbuf, fd);
+ dpaa2_dev_rx_parse_new(mbuf, fd, hw_annot_addr);
else
- mbuf->packet_type = dpaa2_dev_rx_parse(mbuf,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ mbuf->packet_type = dpaa2_dev_rx_parse(mbuf, hw_annot_addr);
DPAA2_PMD_DP_DEBUG("to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d,"
"fd_off=%d fd =%" PRIx64 ", meta = %d bpid =%d, len=%d\n",
return mbuf;
}
-static int __attribute__ ((noinline)) __attribute__((hot))
+static int __rte_noinline __rte_hot
eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
struct qbman_fd *fd, uint16_t bpid)
{
static void
eth_mbuf_to_fd(struct rte_mbuf *mbuf,
- struct qbman_fd *fd, uint16_t bpid) __attribute__((unused));
+ struct qbman_fd *fd, uint16_t bpid) __rte_unused;
-static void __attribute__ ((noinline)) __attribute__((hot))
+static void __rte_noinline __rte_hot
eth_mbuf_to_fd(struct rte_mbuf *mbuf,
struct qbman_fd *fd, uint16_t bpid)
{
}
}
-static inline int __attribute__((hot))
+static inline int __rte_hot
eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
struct qbman_fd *fd, uint16_t bpid)
{
int ret, num_rx = 0, pull_size;
uint8_t pending, status;
struct qbman_swp *swp;
- const struct qbman_fd *fd, *next_fd;
+ const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+#if defined(RTE_LIBRTE_IEEE1588)
+ struct dpaa2_dev_priv *priv = eth_data->dev_private;
+#endif
if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) {
ret = dpaa2_affine_qbman_ethrx_swp();
}
fd = qbman_result_DQ_fd(dq_storage);
+#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
if (dpaa2_svr_family != SVR_LX2160A) {
- next_fd = qbman_result_DQ_fd(dq_storage + 1);
+ const struct qbman_fd *next_fd =
+ qbman_result_DQ_fd(dq_storage + 1);
/* Prefetch Annotation address for the parse results */
- rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(
- next_fd) + DPAA2_FD_PTA_SIZE + 16));
+ rte_prefetch0(DPAA2_IOVA_TO_VADDR((DPAA2_GET_FD_ADDR(
+ next_fd) + DPAA2_FD_PTA_SIZE + 16)));
}
+#endif
if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
- bufs[num_rx] = eth_sg_fd_to_mbuf(fd);
+ bufs[num_rx] = eth_sg_fd_to_mbuf(fd, eth_data->port_id);
else
- bufs[num_rx] = eth_fd_to_mbuf(fd);
- bufs[num_rx]->port = eth_data->port_id;
+ bufs[num_rx] = eth_fd_to_mbuf(fd, eth_data->port_id);
+#if defined(RTE_LIBRTE_IEEE1588)
+ priv->rx_timestamp = bufs[num_rx]->timestamp;
+#endif
if (eth_data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_STRIP)
return num_rx;
}
-void __attribute__((hot))
+void __rte_hot
dpaa2_dev_process_parallel_event(struct qbman_swp *swp,
const struct qbman_fd *fd,
const struct qbman_result *dq,
ev->queue_id = rxq->ev.queue_id;
ev->priority = rxq->ev.priority;
- ev->mbuf = eth_fd_to_mbuf(fd);
+ ev->mbuf = eth_fd_to_mbuf(fd, rxq->eth_data->port_id);
qbman_swp_dqrr_consume(swp, dq);
}
-void __attribute__((hot))
-dpaa2_dev_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
+void __rte_hot
+dpaa2_dev_process_atomic_event(struct qbman_swp *swp __rte_unused,
const struct qbman_fd *fd,
const struct qbman_result *dq,
struct dpaa2_queue *rxq,
ev->queue_id = rxq->ev.queue_id;
ev->priority = rxq->ev.priority;
- ev->mbuf = eth_fd_to_mbuf(fd);
+ ev->mbuf = eth_fd_to_mbuf(fd, rxq->eth_data->port_id);
dqrr_index = qbman_get_dqrr_idx(dq);
ev->mbuf->seqn = dqrr_index + 1;
DPAA2_PER_LCORE_DQRR_MBUF(dqrr_index) = ev->mbuf;
}
-void __attribute__((hot))
+void __rte_hot
dpaa2_dev_process_ordered_event(struct qbman_swp *swp,
const struct qbman_fd *fd,
const struct qbman_result *dq,
ev->queue_id = rxq->ev.queue_id;
ev->priority = rxq->ev.priority;
- ev->mbuf = eth_fd_to_mbuf(fd);
+ ev->mbuf = eth_fd_to_mbuf(fd, rxq->eth_data->port_id);
ev->mbuf->seqn = DPAA2_ENQUEUE_FLAG_ORP;
ev->mbuf->seqn |= qbman_result_DQ_odpid(dq) << DPAA2_EQCR_OPRID_SHIFT;
int ret, num_rx = 0, next_pull = nb_pkts, num_pulled;
uint8_t pending, status;
struct qbman_swp *swp;
- const struct qbman_fd *fd, *next_fd;
+ const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal\n");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
}
fd = qbman_result_DQ_fd(dq_storage);
- next_fd = qbman_result_DQ_fd(dq_storage + 1);
- /* Prefetch Annotation address for the parse results */
- rte_prefetch0(
- (void *)(size_t)(DPAA2_GET_FD_ADDR(next_fd)
- + DPAA2_FD_PTA_SIZE + 16));
+#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
+ if (dpaa2_svr_family != SVR_LX2160A) {
+ const struct qbman_fd *next_fd =
+ qbman_result_DQ_fd(dq_storage + 1);
+
+ /* Prefetch Annotation address for the parse
+ * results.
+ */
+ rte_prefetch0((DPAA2_IOVA_TO_VADDR(
+ DPAA2_GET_FD_ADDR(next_fd) +
+ DPAA2_FD_PTA_SIZE + 16)));
+ }
+#endif
if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
- bufs[num_rx] = eth_sg_fd_to_mbuf(fd);
+ bufs[num_rx] = eth_sg_fd_to_mbuf(fd,
+ eth_data->port_id);
else
- bufs[num_rx] = eth_fd_to_mbuf(fd);
- bufs[num_rx]->port = eth_data->port_id;
+ bufs[num_rx] = eth_fd_to_mbuf(fd,
+ eth_data->port_id);
if (eth_data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_STRIP) {
return num_rx;
}
+uint16_t dpaa2_dev_tx_conf(void *queue)
+{
+ /* Function receive frames for a given device and VQ */
+ struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+ struct qbman_result *dq_storage;
+ uint32_t fqid = dpaa2_q->fqid;
+ int ret, num_tx_conf = 0, num_pulled;
+ uint8_t pending, status;
+ struct qbman_swp *swp;
+ const struct qbman_fd *fd, *next_fd;
+ struct qbman_pull_desc pulldesc;
+ struct qbman_release_desc releasedesc;
+ uint32_t bpid;
+ uint64_t buf;
+#if defined(RTE_LIBRTE_IEEE1588)
+ struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+ struct dpaa2_dev_priv *priv = eth_data->dev_private;
+ struct dpaa2_annot_hdr *annotation;
+#endif
+
+ if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+ ret = dpaa2_affine_qbman_swp();
+ if (ret) {
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
+ return 0;
+ }
+ }
+ swp = DPAA2_PER_LCORE_PORTAL;
+
+ do {
+ dq_storage = dpaa2_q->q_storage->dq_storage[0];
+ qbman_pull_desc_clear(&pulldesc);
+ qbman_pull_desc_set_fq(&pulldesc, fqid);
+ qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+ (size_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+ qbman_pull_desc_set_numframes(&pulldesc, dpaa2_dqrr_size);
+
+ while (1) {
+ if (qbman_swp_pull(swp, &pulldesc)) {
+ DPAA2_PMD_DP_DEBUG("VDQ command is not issued."
+ "QBMAN is busy\n");
+ /* Portal was busy, try again */
+ continue;
+ }
+ break;
+ }
+
+ rte_prefetch0((void *)((size_t)(dq_storage + 1)));
+ /* Check if the previous issued command is completed. */
+ while (!qbman_check_command_complete(dq_storage))
+ ;
+
+ num_pulled = 0;
+ pending = 1;
+ do {
+ /* Loop until the dq_storage is updated with
+ * new token by QBMAN
+ */
+ while (!qbman_check_new_result(dq_storage))
+ ;
+ rte_prefetch0((void *)((size_t)(dq_storage + 2)));
+ /* Check whether Last Pull command is Expired and
+ * setting Condition for Loop termination
+ */
+ if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+ pending = 0;
+ /* Check for valid frame. */
+ status = qbman_result_DQ_flags(dq_storage);
+ if (unlikely((status &
+ QBMAN_DQ_STAT_VALIDFRAME) == 0))
+ continue;
+ }
+ fd = qbman_result_DQ_fd(dq_storage);
+
+ next_fd = qbman_result_DQ_fd(dq_storage + 1);
+ /* Prefetch Annotation address for the parse results */
+ rte_prefetch0((void *)(size_t)
+ (DPAA2_GET_FD_ADDR(next_fd) +
+ DPAA2_FD_PTA_SIZE + 16));
+
+ bpid = DPAA2_GET_FD_BPID(fd);
+
+ /* Create a release descriptor required for releasing
+ * buffers into QBMAN
+ */
+ qbman_release_desc_clear(&releasedesc);
+ qbman_release_desc_set_bpid(&releasedesc, bpid);
+
+ buf = DPAA2_GET_FD_ADDR(fd);
+ /* feed them to bman */
+ do {
+ ret = qbman_swp_release(swp, &releasedesc,
+ &buf, 1);
+ } while (ret == -EBUSY);
+
+ dq_storage++;
+ num_tx_conf++;
+ num_pulled++;
+#if defined(RTE_LIBRTE_IEEE1588)
+ annotation = (struct dpaa2_annot_hdr *)((size_t)
+ DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+ DPAA2_FD_PTA_SIZE);
+ priv->tx_timestamp = annotation->word2;
+#endif
+ } while (pending);
+
+ /* Last VDQ provided all packets and more packets are requested */
+ } while (num_pulled == dpaa2_dqrr_size);
+
+ dpaa2_q->rx_pkts += num_tx_conf;
+
+ return num_tx_conf;
+}
+
+/* Configure the egress frame annotation for timestamp update */
+static void enable_tx_tstamp(struct qbman_fd *fd)
+{
+ struct dpaa2_faead *fd_faead;
+
+ /* Set frame annotation status field as valid */
+ (fd)->simple.frc |= DPAA2_FD_FRC_FASV;
+
+ /* Set frame annotation egress action descriptor as valid */
+ (fd)->simple.frc |= DPAA2_FD_FRC_FAEADV;
+
+ /* Set Annotation Length as 128B */
+ (fd)->simple.ctrl |= DPAA2_FD_CTRL_ASAL;
+
+ /* enable update of confirmation frame annotation */
+ fd_faead = (struct dpaa2_faead *)((size_t)
+ DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+ DPAA2_FD_PTA_SIZE + DPAA2_FD_HW_ANNOT_FAEAD_OFFSET);
+ fd_faead->ctrl = DPAA2_ANNOT_FAEAD_A2V | DPAA2_ANNOT_FAEAD_UPDV |
+ DPAA2_ANNOT_FAEAD_UPD;
+}
+
/*
* Callback to handle sending packets through WRIOP based interface
*/
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
DPAA2_PMD_DP_DEBUG("===> eth_data =%p, fqid =%d\n",
eth_data, dpaa2_q->fqid);
+#ifdef RTE_LIBRTE_IEEE1588
+ /* IEEE1588 driver need pointer to tx confirmation queue
+ * corresponding to last packet transmitted for reading
+ * the timestamp
+ */
+ priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue;
+ dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
+#endif
+
/*Prepare enqueue descriptor*/
qbman_eq_desc_clear(&eqdesc);
qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
- qbman_eq_desc_set_qd(&eqdesc, priv->qdid,
- dpaa2_q->flow_id, dpaa2_q->tc_index);
+ qbman_eq_desc_set_fq(&eqdesc, dpaa2_q->fqid);
+
/*Clear the unused FD fields before sending*/
while (nb_pkts) {
/*Check if the queue is congested*/
DPAA2_MBUF_TO_CONTIG_FD((*bufs),
&fd_arr[loop], mempool_to_bpid(mp));
bufs++;
+#ifdef RTE_LIBRTE_IEEE1588
+ enable_tx_tstamp(&fd_arr[loop]);
+#endif
continue;
}
} else {
&fd_arr[loop], bpid);
}
}
+#ifdef RTE_LIBRTE_IEEE1588
+ enable_tx_tstamp(&fd_arr[loop]);
+#endif
bufs++;
}
+
loop = 0;
+ retry_count = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
+ ret = qbman_swp_enqueue_multiple(swp, &eqdesc,
&fd_arr[loop], &flags[loop],
frames_to_send - loop);
+ if (unlikely(ret < 0)) {
+ retry_count++;
+ if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
+ num_tx += loop;
+ nb_pkts -= loop;
+ goto send_n_return;
+ }
+ } else {
+ loop += ret;
+ retry_count = 0;
+ }
}
- num_tx += frames_to_send;
- nb_pkts -= frames_to_send;
+ num_tx += loop;
+ nb_pkts -= loop;
}
dpaa2_q->tx_pkts += num_tx;
return num_tx;
if (loop) {
unsigned int i = 0;
+ retry_count = 0;
while (i < loop) {
- i += qbman_swp_enqueue_multiple(swp, &eqdesc,
- &fd_arr[i],
- &flags[loop],
- loop - i);
+ ret = qbman_swp_enqueue_multiple(swp, &eqdesc,
+ &fd_arr[i],
+ &flags[i],
+ loop - i);
+ if (unlikely(ret < 0)) {
+ retry_count++;
+ if (retry_count > DPAA2_MAX_TX_RETRY_COUNT)
+ break;
+ } else {
+ i += ret;
+ retry_count = 0;
+ }
}
- num_tx += loop;
+ num_tx += i;
}
skip_tx:
dpaa2_q->tx_pkts += num_tx;
struct rte_mbuf *m;
fd = qbman_result_eqresp_fd(&dpio_dev->eqresp[eqresp_ci]);
- m = eth_fd_to_mbuf(fd);
+
+ /* Setting port id does not matter as we are to free the mbuf */
+ m = eth_fd_to_mbuf(fd, 0);
rte_pktmbuf_free(m);
}
uint16_t orpid, seqnum;
uint8_t dq_idx;
- qbman_eq_desc_set_qd(eqdesc, priv->qdid, dpaa2_q->flow_id,
- dpaa2_q->tc_index);
+ qbman_eq_desc_set_fq(eqdesc, dpaa2_q->fqid);
if (m->seqn & DPAA2_ENQUEUE_FLAG_ORP) {
orpid = (m->seqn & DPAA2_EQCR_OPRID_MASK) >>
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
} else {
qbman_eq_desc_set_no_orp(&eqdesc[loop],
DPAA2_EQ_RESP_ERR_FQ);
- qbman_eq_desc_set_qd(&eqdesc[loop], priv->qdid,
- dpaa2_q->flow_id,
- dpaa2_q->tc_index);
+ qbman_eq_desc_set_fq(&eqdesc[loop],
+ dpaa2_q->fqid);
}
if (likely(RTE_MBUF_DIRECT(*bufs))) {
}
bufs++;
}
+
loop = 0;
+ retry_count = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_enqueue_multiple_desc(swp,
+ ret = qbman_swp_enqueue_multiple_desc(swp,
&eqdesc[loop], &fd_arr[loop],
frames_to_send - loop);
+ if (unlikely(ret < 0)) {
+ retry_count++;
+ if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
+ num_tx += loop;
+ nb_pkts -= loop;
+ goto send_n_return;
+ }
+ } else {
+ loop += ret;
+ retry_count = 0;
+ }
}
- num_tx += frames_to_send;
- nb_pkts -= frames_to_send;
+ num_tx += loop;
+ nb_pkts -= loop;
}
dpaa2_q->tx_pkts += num_tx;
return num_tx;
if (loop) {
unsigned int i = 0;
+ retry_count = 0;
while (i < loop) {
- i += qbman_swp_enqueue_multiple_desc(swp, &eqdesc[loop],
- &fd_arr[i], loop - i);
+ ret = qbman_swp_enqueue_multiple_desc(swp,
+ &eqdesc[loop], &fd_arr[i], loop - i);
+ if (unlikely(ret < 0)) {
+ retry_count++;
+ if (retry_count > DPAA2_MAX_TX_RETRY_COUNT)
+ break;
+ } else {
+ i += ret;
+ retry_count = 0;
+ }
}
- num_tx += loop;
+ num_tx += i;
}
skip_tx:
dpaa2_q->tx_pkts += num_tx;