net/e1000/base: expose more future extended NVM
[dpdk.git] / drivers / net / e1000 / base / e1000_defines.h
index 8831da7..41a2b5c 100644 (file)
 #define E1000_CTRL_SWDPIO0     0x00400000 /* SWDPIN 0 Input or output */
 #define E1000_CTRL_SWDPIO2     0x01000000 /* SWDPIN 2 input or output */
 #define E1000_CTRL_SWDPIO3     0x02000000 /* SWDPIN 3 input or output */
+#define E1000_CTRL_DEV_RST     0x20000000 /* Device reset */
 #define E1000_CTRL_RST         0x04000000 /* Global reset */
 #define E1000_CTRL_RFCE                0x08000000 /* Receive Flow Control enable */
 #define E1000_CTRL_TFCE                0x10000000 /* Transmit flow control enable */
 #define E1000_STATUS_PCIX_SPEED_66     0x00000000 /* PCI-X bus spd 50-66MHz */
 #define E1000_STATUS_PCIX_SPEED_100    0x00004000 /* PCI-X bus spd 66-100MHz */
 #define E1000_STATUS_PCIX_SPEED_133    0x00008000 /* PCI-X bus spd 100-133MHz*/
+#define E1000_STATUS_PCIM_STATE                0x40000000 /* PCIm function state */
 
 #define SPEED_10       10
 #define SPEED_100      100
 #define E1000_RFCTL_LEF                        0x00040000
 
 /* Collision related configuration parameters */
-#define E1000_COLLISION_THRESHOLD      15
 #define E1000_CT_SHIFT                 4
+#define E1000_COLLISION_THRESHOLD      15
 #define E1000_COLLISION_DISTANCE       63
 #define E1000_COLD_SHIFT               12
 
 #define E1000_TIMINCA_INCPERIOD_SHIFT  24
 #define E1000_TIMINCA_INCVALUE_MASK    0x00FFFFFF
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_1588                        (1 << 30)
+#define E1000_FTQF_VF_BP               0x00008000
+#define E1000_FTQF_1588_TIME_STAMP     0x08000000
+#define E1000_FTQF_MASK                        0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP       0x10000000
+/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIREXT_CTRL_BP  0x00080000  /* Bypass check of ctrl bits */
+#define E1000_IMIREXT_SIZE_BP  0x00001000  /* Packet size bypass */
+
+#define E1000_RXDADV_STAT_TSIP         0x08000 /* timestamp in packet */
 #define E1000_TSICR_TXTS               0x00000002
 #define E1000_TSIM_TXTS                        0x00000002
 /* TUPLE Filtering Configuration */