net/qede/base: add LLDP support
[dpdk.git] / drivers / net / e1000 / base / e1000_ich8lan.c
index 89265d2..6dd046d 100644 (file)
@@ -346,6 +346,7 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
        switch (hw->mac.type) {
        case e1000_pch_lpt:
        case e1000_pch_spt:
+       case e1000_pch_cnp:
                if (e1000_phy_is_accessible_pchlan(hw))
                        break;
 
@@ -494,6 +495,7 @@ STATIC s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
                case e1000_pch2lan:
                case e1000_pch_lpt:
                case e1000_pch_spt:
+               case e1000_pch_cnp:
                        /* In case the PHY needs to be in mdio slow mode,
                         * set slow mode and try to get the PHY id again.
                         */
@@ -798,6 +800,7 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
                /* fall-through */
        case e1000_pch_lpt:
        case e1000_pch_spt:
+       case e1000_pch_cnp:
 #ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
                /* multicast address update for pch2 */
                mac->ops.update_mc_addr_list =
@@ -1688,6 +1691,9 @@ STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
                                fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
                }
 
+               if (hw->dev_spec.ich8lan.disable_k1_off == true)
+                       fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
+
                E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6);
        }
 
@@ -1785,6 +1791,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw)
        case e1000_pch2lan:
        case e1000_pch_lpt:
        case e1000_pch_spt:
+       case e1000_pch_cnp:
                hw->phy.ops.init_params = e1000_init_phy_params_pchlan;
                break;
        default:
@@ -2251,6 +2258,7 @@ STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
        case e1000_pch2lan:
        case e1000_pch_lpt:
        case e1000_pch_spt:
+       case e1000_pch_cnp:
                sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
                break;
        default:
@@ -3375,6 +3383,7 @@ STATIC s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 
        switch (hw->mac.type) {
        case e1000_pch_spt:
+       case e1000_pch_cnp:
                bank1_offset = nvm->flash_bank_size;
                act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4350,6 +4359,7 @@ STATIC s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
        switch (hw->mac.type) {
        case e1000_pch_lpt:
        case e1000_pch_spt:
+       case e1000_pch_cnp:
                word = NVM_COMPAT;
                valid_csum_mask = NVM_COMPAT_VALID_CSUM;
                break;