net/virtio: fix incorrect cast of void *

[dpdk.git] / drivers / net / e1000 / base / e1000_phy.c

diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index e214f17..33f478b 100644 (file)
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1,6 +1,6 @@
 /*******************************************************************************
 
-Copyright (c) 2001-2014, Intel Corporation
+Copyright (c) 2001-2015, Intel Corporation
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
@@ -1833,9 +1833,9 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
                                             phy_data);
                if (ret_val)
                        return ret_val;
-       }
 
-       DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data);
+               DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data);
+       }
 
        ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
        if (ret_val)
@@ -3498,16 +3498,10 @@ STATIC s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
 void e1000_power_up_phy_copper(struct e1000_hw *hw)
 {
        u16 mii_reg = 0;
-       u16 power_reg = 0;
 
        /* The PHY will retain its settings across a power down/up cycle */
        hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
        mii_reg &= ~MII_CR_POWER_DOWN;
-       if (hw->phy.type == e1000_phy_i210) {
-               hw->phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &power_reg);
-               power_reg &= ~GS40G_CS_POWER_DOWN;
-               hw->phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg);
-       }
        hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
 }
 
@@ -3522,17 +3516,10 @@ void e1000_power_up_phy_copper(struct e1000_hw *hw)
 void e1000_power_down_phy_copper(struct e1000_hw *hw)
 {
        u16 mii_reg = 0;
-       u16 power_reg = 0;
 
        /* The PHY will retain its settings across a power down/up cycle */
        hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
        mii_reg |= MII_CR_POWER_DOWN;
-       /* i210 Phy requires an additional bit for power up/down */
-       if (hw->phy.type == e1000_phy_i210) {
-               hw->phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &power_reg);
-               power_reg |= GS40G_CS_POWER_DOWN;
-               hw->phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg);
-       }
        hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
        msec_delay(1);
 }
@@ -3563,7 +3550,6 @@ STATIC s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
                if (ret_val)
                        return ret_val;
        }
-
        /* Page 800 works differently than the rest so it has its own func */
        if (page == BM_WUC_PAGE) {
                ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
@@ -3673,7 +3659,6 @@ STATIC s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
                if (ret_val)
                        return ret_val;
        }
-
        /* Page 800 works differently than the rest so it has its own func */
        if (page == BM_WUC_PAGE) {
                ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
@@ -4168,12 +4153,13 @@ s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)
        *data = E1000_READ_REG(hw, E1000_MPHY_DATA);
 
        /* Disable access to mPHY if it was originally disabled */
-       if (locked)
+       if (locked) {
                ready = e1000_is_mphy_ready(hw);
                if (!ready)
                        return -E1000_ERR_PHY;
                E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
                                E1000_MPHY_DIS_ACCESS);
+       }
 
        return E1000_SUCCESS;
 }
@@ -4233,12 +4219,13 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
        E1000_WRITE_REG(hw, E1000_MPHY_DATA, data);
 
        /* Disable access to mPHY if it was originally disabled */
-       if (locked)
+       if (locked) {
                ready = e1000_is_mphy_ready(hw);
                if (!ready)
                        return -E1000_ERR_PHY;
                E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
                                E1000_MPHY_DIS_ACCESS);
+       }
 
        return E1000_SUCCESS;
 }