net/ice: refactor flow director filter structure

[dpdk.git] / drivers / net / e1000 / e1000_ethdev.h

diff --git a/drivers/net/e1000/e1000_ethdev.h b/drivers/net/e1000/e1000_ethdev.h
index 67acb73..3b4d9c3 100644 (file)
--- a/drivers/net/e1000/e1000_ethdev.h
+++ b/drivers/net/e1000/e1000_ethdev.h
@@ -35,6 +35,9 @@
 #define IGB_MAX_RX_QUEUE_NUM           8
 #define IGB_MAX_RX_QUEUE_NUM_82576     16
 
+#define E1000_I219_MAX_RX_QUEUE_NUM            2
+#define E1000_I219_MAX_TX_QUEUE_NUM            2
+
 #define E1000_SYN_FILTER_ENABLE        0x00000001 /* syn filter enable field */
 #define E1000_SYN_FILTER_QUEUE         0x0000000E /* syn filter queue field */
 #define E1000_SYN_FILTER_QUEUE_SHIFT   1          /* syn filter queue field */
@@ -94,7 +97,7 @@
  */
 #define E1000_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
                                VLAN_TAG_SIZE)
-
+#define E1000_ETH_MAX_LEN (RTE_ETHER_MTU + E1000_ETH_OVERHEAD)
 /*
  * Maximum number of Ring Descriptors.
  *
@@ -328,10 +331,28 @@ struct igb_eth_syn_filter_ele {
        struct rte_eth_syn_filter filter_info;
 };
 
+#define IGB_FLEX_FILTER_MAXLEN 128     /**< bytes to use in flex filter. */
+#define IGB_FLEX_FILTER_MASK_SIZE      \
+       (RTE_ALIGN(IGB_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
+                                       /**< mask bytes in flex filter. */
+
+/**
+ * A structure used to define the flex filter entry
+ * to support RTE_ETH_FILTER_FLEXIBLE data representation.
+ */
+struct igb_flex_filter {
+       uint16_t len;
+       uint8_t bytes[IGB_FLEX_FILTER_MAXLEN]; /**< flex bytes in big endian. */
+       uint8_t mask[IGB_FLEX_FILTER_MASK_SIZE];
+               /**< if mask bit is 1b, do not compare corresponding byte. */
+       uint8_t priority;
+       uint16_t queue;       /**< Queue assigned to when match. */
+};
+
 /* flex filter list structure */
 struct igb_flex_filter_ele {
        TAILQ_ENTRY(igb_flex_filter_ele) entries;
-       struct rte_eth_flex_filter filter_info;
+       struct igb_flex_filter filter_info;
 };
 
 /* rss filter  list structure */
@@ -348,17 +369,17 @@ struct igb_flow_mem {
 };
 
 TAILQ_HEAD(igb_ntuple_filter_list, igb_ntuple_filter_ele);
-struct igb_ntuple_filter_list igb_filter_ntuple_list;
+extern struct igb_ntuple_filter_list igb_filter_ntuple_list;
 TAILQ_HEAD(igb_ethertype_filter_list, igb_ethertype_filter_ele);
-struct igb_ethertype_filter_list igb_filter_ethertype_list;
+extern struct igb_ethertype_filter_list igb_filter_ethertype_list;
 TAILQ_HEAD(igb_syn_filter_list, igb_eth_syn_filter_ele);
-struct igb_syn_filter_list igb_filter_syn_list;
+extern struct igb_syn_filter_list igb_filter_syn_list;
 TAILQ_HEAD(igb_flex_filter_list, igb_flex_filter_ele);
-struct igb_flex_filter_list igb_filter_flex_list;
+extern struct igb_flex_filter_list igb_filter_flex_list;
 TAILQ_HEAD(igb_rss_filter_list, igb_rss_conf_ele);
-struct igb_rss_filter_list igb_filter_rss_list;
+extern struct igb_rss_filter_list igb_filter_rss_list;
 TAILQ_HEAD(igb_flow_mem_list, igb_flow_mem);
-struct igb_flow_mem_list igb_flow_list;
+extern struct igb_flow_mem_list igb_flow_list;
 
 extern const struct rte_flow_ops igb_flow_ops;
 
@@ -512,7 +533,7 @@ int eth_igb_syn_filter_set(struct rte_eth_dev *dev,
                        struct rte_eth_syn_filter *filter,
                        bool add);
 int eth_igb_add_del_flex_filter(struct rte_eth_dev *dev,
-                       struct rte_eth_flex_filter *filter,
+                       struct igb_flex_filter *filter,
                        bool add);
 int igb_rss_conf_init(struct rte_eth_dev *dev,
                      struct igb_rte_flow_rss_conf *out,
@@ -522,5 +543,6 @@ int igb_action_rss_same(const struct rte_flow_action_rss *comp,
 int igb_config_rss_filter(struct rte_eth_dev *dev,
                        struct igb_rte_flow_rss_conf *conf,
                        bool add);
+void em_flush_desc_rings(struct rte_eth_dev *dev);
 
 #endif /* _E1000_ETHDEV_H_ */