struct rte_eth_xstat_name *xstats_names,
unsigned int size);
static int eth_igb_xstats_get_names_by_id(struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
+ const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
unsigned int limit);
static int eth_igb_stats_reset(struct rte_eth_dev *dev);
static int eth_igb_xstats_reset(struct rte_eth_dev *dev);
eth_dev->dev_ops = ð_igb_ops;
eth_dev->rx_queue_count = eth_igb_rx_queue_count;
- eth_dev->rx_descriptor_done = eth_igb_rx_descriptor_done;
eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status;
eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status;
eth_dev->rx_pkt_burst = ð_igb_recv_pkts;
}
rte_eth_copy_pci_info(eth_dev, pci_dev);
- eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
hw->hw_addr= (void *)pci_dev->mem_resource[0].addr;
PMD_INIT_FUNC_TRACE();
eth_dev->dev_ops = &igbvf_eth_dev_ops;
- eth_dev->rx_descriptor_done = eth_igb_rx_descriptor_done;
eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status;
eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status;
eth_dev->rx_pkt_burst = ð_igb_recv_pkts;
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
rte_eth_copy_pci_info(eth_dev, pci_dev);
- eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
hw->device_id = pci_dev->id.device_id;
hw->vendor_id = pci_dev->id.vendor_id;
}
static int eth_igb_xstats_get_names_by_id(struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
+ const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
unsigned int limit)
{
unsigned int i;
} else {
struct rte_eth_xstat_name xstats_names_copy[IGB_NB_XSTATS];
- eth_igb_xstats_get_names_by_id(dev, xstats_names_copy, NULL,
+ eth_igb_xstats_get_names_by_id(dev, NULL, xstats_names_copy,
IGB_NB_XSTATS);
for (i = 0; i < limit; i++) {