net/enic: enable flow API for VF representor
[dpdk.git] / drivers / net / e1000 / igb_ethdev.c
index 647d550..5ab7484 100644 (file)
@@ -380,10 +380,6 @@ static const struct eth_dev_ops eth_igb_ops = {
        .rx_queue_intr_enable = eth_igb_rx_queue_intr_enable,
        .rx_queue_intr_disable = eth_igb_rx_queue_intr_disable,
        .rx_queue_release     = eth_igb_rx_queue_release,
-       .rx_queue_count       = eth_igb_rx_queue_count,
-       .rx_descriptor_done   = eth_igb_rx_descriptor_done,
-       .rx_descriptor_status = eth_igb_rx_descriptor_status,
-       .tx_descriptor_status = eth_igb_tx_descriptor_status,
        .tx_queue_setup       = eth_igb_tx_queue_setup,
        .tx_queue_release     = eth_igb_tx_queue_release,
        .tx_done_cleanup      = eth_igb_tx_done_cleanup,
@@ -441,9 +437,6 @@ static const struct eth_dev_ops igbvf_eth_dev_ops = {
        .dev_supported_ptypes_get = eth_igb_supported_ptypes_get,
        .rx_queue_setup       = eth_igb_rx_queue_setup,
        .rx_queue_release     = eth_igb_rx_queue_release,
-       .rx_descriptor_done   = eth_igb_rx_descriptor_done,
-       .rx_descriptor_status = eth_igb_rx_descriptor_status,
-       .tx_descriptor_status = eth_igb_tx_descriptor_status,
        .tx_queue_setup       = eth_igb_tx_queue_setup,
        .tx_queue_release     = eth_igb_tx_queue_release,
        .tx_done_cleanup      = eth_igb_tx_done_cleanup,
@@ -754,6 +747,10 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)
        uint32_t ctrl_ext;
 
        eth_dev->dev_ops = &eth_igb_ops;
+       eth_dev->rx_queue_count = eth_igb_rx_queue_count;
+       eth_dev->rx_descriptor_done   = eth_igb_rx_descriptor_done;
+       eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status;
+       eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status;
        eth_dev->rx_pkt_burst = &eth_igb_recv_pkts;
        eth_dev->tx_pkt_burst = &eth_igb_xmit_pkts;
        eth_dev->tx_pkt_prepare = &eth_igb_prep_pkts;
@@ -923,7 +920,7 @@ eth_igb_dev_uninit(struct rte_eth_dev *eth_dev)
        PMD_INIT_FUNC_TRACE();
 
        if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-               return -EPERM;
+               return 0;
 
        eth_igb_close(eth_dev);
 
@@ -949,6 +946,9 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev)
        PMD_INIT_FUNC_TRACE();
 
        eth_dev->dev_ops = &igbvf_eth_dev_ops;
+       eth_dev->rx_descriptor_done   = eth_igb_rx_descriptor_done;
+       eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status;
+       eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status;
        eth_dev->rx_pkt_burst = &eth_igb_recv_pkts;
        eth_dev->tx_pkt_burst = &eth_igb_xmit_pkts;
        eth_dev->tx_pkt_prepare = &eth_igb_prep_pkts;
@@ -1044,7 +1044,7 @@ eth_igbvf_dev_uninit(struct rte_eth_dev *eth_dev)
        PMD_INIT_FUNC_TRACE();
 
        if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-               return -EPERM;
+               return 0;
 
        igbvf_dev_close(eth_dev);
 
@@ -2915,13 +2915,12 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev,
                                     dev->data->port_id);
                }
 
-               PMD_INIT_LOG(DEBUG, "PCI Address: %04d:%02d:%02d:%d",
+               PMD_INIT_LOG(DEBUG, "PCI Address: " PCI_PRI_FMT,
                             pci_dev->addr.domain,
                             pci_dev->addr.bus,
                             pci_dev->addr.devid,
                             pci_dev->addr.function);
-               _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
-                                             NULL);
+               rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
        }
 
        return 0;
@@ -2983,8 +2982,8 @@ void igbvf_mbx_process(struct rte_eth_dev *dev)
                /* dummy mbx read to ack pf */
                if (mbx->ops.read(hw, &in_msg, 1, 0))
                        return;
-               _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
-                                             NULL);
+               rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
+                                            NULL);
        }
 }