net/qede: remove flags from Tx entry
[dpdk.git] / drivers / net / ena / base / ena_com.c
index 04f5d21..aae6872 100644 (file)
@@ -34,7 +34,9 @@
 
 #define ENA_REGS_ADMIN_INTR_MASK 1
 
-#define ENA_POLL_MS    5
+#define ENA_MIN_ADMIN_POLL_US 100
+
+#define ENA_MAX_ADMIN_POLL_US 5000
 
 /*****************************************************************************/
 /*****************************************************************************/
@@ -73,7 +75,7 @@ static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
        }
 
        ena_addr->mem_addr_low = lower_32_bits(addr);
-       ena_addr->mem_addr_high = upper_32_bits(addr);
+       ena_addr->mem_addr_high = (u16)upper_32_bits(addr);
 
        return 0;
 }
@@ -378,6 +380,8 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,
                       0x0, io_sq->llq_info.desc_list_entry_size);
                io_sq->llq_buf_ctrl.descs_left_in_line =
                        io_sq->llq_info.descs_num_before_header;
+               io_sq->disable_meta_caching =
+                       io_sq->llq_info.disable_meta_caching;
 
                if (io_sq->llq_info.max_entries_in_tx_burst > 0)
                        io_sq->entries_in_tx_burst_left =
@@ -409,19 +413,21 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev,
        size = io_cq->cdesc_entry_size_in_bytes * io_cq->q_depth;
        io_cq->bus = ena_dev->bus;
 
-       ENA_MEM_ALLOC_COHERENT_NODE(ena_dev->dmadev,
-                       size,
-                       io_cq->cdesc_addr.virt_addr,
-                       io_cq->cdesc_addr.phys_addr,
-                       io_cq->cdesc_addr.mem_handle,
-                       ctx->numa_node,
-                       prev_node);
+       ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(ena_dev->dmadev,
+                                           size,
+                                           io_cq->cdesc_addr.virt_addr,
+                                           io_cq->cdesc_addr.phys_addr,
+                                           io_cq->cdesc_addr.mem_handle,
+                                           ctx->numa_node,
+                                           prev_node,
+                                           ENA_CDESC_RING_SIZE_ALIGNMENT);
        if (!io_cq->cdesc_addr.virt_addr) {
-               ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev,
-                                      size,
-                                      io_cq->cdesc_addr.virt_addr,
-                                      io_cq->cdesc_addr.phys_addr,
-                                      io_cq->cdesc_addr.mem_handle);
+               ENA_MEM_ALLOC_COHERENT_ALIGNED(ena_dev->dmadev,
+                                              size,
+                                              io_cq->cdesc_addr.virt_addr,
+                                              io_cq->cdesc_addr.phys_addr,
+                                              io_cq->cdesc_addr.mem_handle,
+                                              ENA_CDESC_RING_SIZE_ALIGNMENT);
        }
 
        if (!io_cq->cdesc_addr.virt_addr) {
@@ -515,26 +521,36 @@ static int ena_com_comp_status_to_errno(u8 comp_status)
        case ENA_ADMIN_ILLEGAL_PARAMETER:
        case ENA_ADMIN_UNKNOWN_ERROR:
                return ENA_COM_INVAL;
+       case ENA_ADMIN_RESOURCE_BUSY:
+               return ENA_COM_TRY_AGAIN;
        }
 
        return ENA_COM_INVAL;
 }
 
+static void ena_delay_exponential_backoff_us(u32 exp, u32 delay_us)
+{
+       delay_us = ENA_MAX32(ENA_MIN_ADMIN_POLL_US, delay_us);
+       delay_us = ENA_MIN32(delay_us * (1U << exp), ENA_MAX_ADMIN_POLL_US);
+       ENA_USLEEP(delay_us);
+}
+
 static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_ctx,
                                                     struct ena_com_admin_queue *admin_queue)
 {
        unsigned long flags = 0;
        ena_time_t timeout;
        int ret;
+       u32 exp = 0;
 
        timeout = ENA_GET_SYSTEM_TIMEOUT(admin_queue->completion_timeout);
 
        while (1) {
-                ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags);
-                ena_com_handle_admin_completion(admin_queue);
-                ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags);
+               ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags);
+               ena_com_handle_admin_completion(admin_queue);
+               ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags);
 
-                if (comp_ctx->status != ENA_CMD_SUBMITTED)
+               if (comp_ctx->status != ENA_CMD_SUBMITTED)
                        break;
 
                if (ENA_TIME_EXPIRE(timeout)) {
@@ -549,7 +565,8 @@ static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_c
                        goto err;
                }
 
-               ENA_MSLEEP(ENA_POLL_MS);
+               ena_delay_exponential_backoff_us(exp++,
+                                                admin_queue->ena_dev->ena_min_poll_delay_us);
        }
 
        if (unlikely(comp_ctx->status == ENA_CMD_ABORTED)) {
@@ -595,6 +612,10 @@ static int ena_com_set_llq(struct ena_com_dev *ena_dev)
        cmd.u.llq.desc_num_before_header_enabled = llq_info->descs_num_before_header;
        cmd.u.llq.descriptors_stride_ctrl_enabled = llq_info->desc_stride_ctrl;
 
+       cmd.u.llq.accel_mode.u.set.enabled_flags =
+               BIT(ENA_ADMIN_DISABLE_META_CACHING) |
+               BIT(ENA_ADMIN_LIMIT_TX_BURST);
+
        ret = ena_com_execute_admin_command(admin_queue,
                                            (struct ena_admin_aq_entry *)&cmd,
                                            sizeof(cmd),
@@ -612,6 +633,7 @@ static int ena_com_config_llq_info(struct ena_com_dev *ena_dev,
                                   struct ena_llq_configurations *llq_default_cfg)
 {
        struct ena_com_llq_info *llq_info = &ena_dev->llq_info;
+       struct ena_admin_accel_mode_get llq_accel_mode_get;
        u16 supported_feat;
        int rc;
 
@@ -714,9 +736,17 @@ static int ena_com_config_llq_info(struct ena_com_dev *ena_dev,
                            supported_feat,
                            llq_info->descs_num_before_header);
        }
+       /* Check for accelerated queue supported */
+       llq_accel_mode_get = llq_features->accel_mode.u.get;
+
+       llq_info->disable_meta_caching =
+               !!(llq_accel_mode_get.supported_flags &
+                  BIT(ENA_ADMIN_DISABLE_META_CACHING));
 
-       llq_info->max_entries_in_tx_burst =
-               (u16)(llq_features->max_tx_burst_size / llq_default_cfg->llq_ring_entry_size_value);
+       if (llq_accel_mode_get.supported_flags & BIT(ENA_ADMIN_LIMIT_TX_BURST))
+               llq_info->max_entries_in_tx_burst =
+                       llq_accel_mode_get.max_tx_burst_size /
+                       llq_default_cfg->llq_ring_entry_size_value;
 
        rc = ena_com_set_llq(ena_dev);
        if (rc)
@@ -929,12 +959,13 @@ static void ena_com_io_queue_free(struct ena_com_dev *ena_dev,
 static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout,
                                u16 exp_state)
 {
-       u32 val, i;
+       u32 val, exp = 0;
+       ena_time_t timeout_stamp;
 
-       /* Convert timeout from resolution of 100ms to ENA_POLL_MS */
-       timeout = (timeout * 100) / ENA_POLL_MS;
+       /* Convert timeout from resolution of 100ms to us resolution. */
+       timeout_stamp = ENA_GET_SYSTEM_TIMEOUT(100 * 1000 * timeout);
 
-       for (i = 0; i < timeout; i++) {
+       while (1) {
                val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF);
 
                if (unlikely(val == ENA_MMIO_READ_TIMEOUT)) {
@@ -946,10 +977,11 @@ static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout,
                        exp_state)
                        return 0;
 
-               ENA_MSLEEP(ENA_POLL_MS);
-       }
+               if (ENA_TIME_EXPIRE(timeout_stamp))
+                       return ENA_COM_TIMER_EXPIRED;
 
-       return ENA_COM_TIMER_EXPIRED;
+               ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us);
+       }
 }
 
 static bool ena_com_check_supported_feature_id(struct ena_com_dev *ena_dev,
@@ -1032,23 +1064,30 @@ static int ena_com_get_feature(struct ena_com_dev *ena_dev,
                                      feature_ver);
 }
 
+int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev)
+{
+       return ena_dev->rss.hash_func;
+}
+
 static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev)
 {
        struct ena_admin_feature_rss_flow_hash_control *hash_key =
                (ena_dev->rss).hash_key;
 
        ENA_RSS_FILL_KEY(&hash_key->key, sizeof(hash_key->key));
-       /* The key is stored in the device in uint32_t array
-        * as well as the API requires the key to be passed in this
-        * format. Thus the size of our array should be divided by 4
+       /* The key buffer is stored in the device in an array of
+        * uint32 elements.
         */
-       hash_key->keys_num = sizeof(hash_key->key) / sizeof(uint32_t);
+       hash_key->keys_num = ENA_ADMIN_RSS_KEY_PARTS;
 }
 
 static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)
 {
        struct ena_rss *rss = &ena_dev->rss;
 
+       if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_FUNCTION))
+               return ENA_COM_UNSUPPORTED;
+
        ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev,
                               sizeof(*rss->hash_key),
                               rss->hash_key,
@@ -1279,63 +1318,29 @@ static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev)
        return 0;
 }
 
-static int ena_com_ind_tbl_convert_from_device(struct ena_com_dev *ena_dev)
-{
-       u16 dev_idx_to_host_tbl[ENA_TOTAL_NUM_QUEUES] = { (u16)-1 };
-       struct ena_rss *rss = &ena_dev->rss;
-       u8 idx;
-       u16 i;
-
-       for (i = 0; i < ENA_TOTAL_NUM_QUEUES; i++)
-               dev_idx_to_host_tbl[ena_dev->io_sq_queues[i].idx] = i;
-
-       for (i = 0; i < 1 << rss->tbl_log_size; i++) {
-               if (rss->rss_ind_tbl[i].cq_idx > ENA_TOTAL_NUM_QUEUES)
-                       return ENA_COM_INVAL;
-               idx = (u8)rss->rss_ind_tbl[i].cq_idx;
-
-               if (dev_idx_to_host_tbl[idx] > ENA_TOTAL_NUM_QUEUES)
-                       return ENA_COM_INVAL;
-
-               rss->host_rss_ind_tbl[i] = dev_idx_to_host_tbl[idx];
-       }
-
-       return 0;
-}
-
-static int ena_com_init_interrupt_moderation_table(struct ena_com_dev *ena_dev)
-{
-       size_t size;
-
-       size = sizeof(struct ena_intr_moder_entry) * ENA_INTR_MAX_NUM_OF_LEVELS;
-
-       ena_dev->intr_moder_tbl = ENA_MEM_ALLOC(ena_dev->dmadev, size);
-       if (!ena_dev->intr_moder_tbl)
-               return ENA_COM_NO_MEM;
-
-       ena_com_config_default_interrupt_moderation_table(ena_dev);
-
-       return 0;
-}
-
 static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev,
                                                 u16 intr_delay_resolution)
 {
-       struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
-       unsigned int i;
+       u16 prev_intr_delay_resolution = ena_dev->intr_delay_resolution;
 
-       if (!intr_delay_resolution) {
+       if (unlikely(!intr_delay_resolution)) {
                ena_trc_err("Illegal intr_delay_resolution provided. Going to use default 1 usec resolution\n");
-               intr_delay_resolution = 1;
+               intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
        }
-       ena_dev->intr_delay_resolution = intr_delay_resolution;
 
        /* update Rx */
-       for (i = 0; i < ENA_INTR_MAX_NUM_OF_LEVELS; i++)
-               intr_moder_tbl[i].intr_moder_interval /= intr_delay_resolution;
+       ena_dev->intr_moder_rx_interval =
+               ena_dev->intr_moder_rx_interval *
+               prev_intr_delay_resolution /
+               intr_delay_resolution;
 
        /* update Tx */
-       ena_dev->intr_moder_tx_interval /= intr_delay_resolution;
+       ena_dev->intr_moder_tx_interval =
+               ena_dev->intr_moder_tx_interval *
+               prev_intr_delay_resolution /
+               intr_delay_resolution;
+
+       ena_dev->intr_delay_resolution = intr_delay_resolution;
 }
 
 /*****************************************************************************/
@@ -1474,11 +1479,12 @@ void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev)
 {
        struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue;
        unsigned long flags = 0;
+       u32 exp = 0;
 
        ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags);
        while (ATOMIC32_READ(&admin_queue->outstanding_cmds) != 0) {
                ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags);
-               ENA_MSLEEP(ENA_POLL_MS);
+               ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us);
                ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags);
        }
        ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags);
@@ -1657,11 +1663,13 @@ void ena_com_admin_destroy(struct ena_com_dev *ena_dev)
        struct ena_com_aenq *aenq = &ena_dev->aenq;
        u16 size;
 
-       ENA_WAIT_EVENT_DESTROY(admin_queue->comp_ctx->wait_event);
-       if (admin_queue->comp_ctx)
+       if (admin_queue->comp_ctx) {
+               ENA_WAIT_EVENT_DESTROY(admin_queue->comp_ctx->wait_event);
                ENA_MEM_FREE(ena_dev->dmadev,
                             admin_queue->comp_ctx,
                             (admin_queue->q_depth * sizeof(struct ena_comp_ctx)));
+       }
+
        admin_queue->comp_ctx = NULL;
        size = ADMIN_SQ_SIZE(admin_queue->q_depth);
        if (sq->entries)
@@ -1695,7 +1703,7 @@ void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling)
        ena_dev->admin_queue.polling = polling;
 }
 
-bool ena_com_get_admin_polling_mode(struct ena_com_dev * ena_dev)
+bool ena_com_get_admin_polling_mode(struct ena_com_dev *ena_dev)
 {
        return ena_dev->admin_queue.polling;
 }
@@ -1843,6 +1851,7 @@ int ena_com_admin_init(struct ena_com_dev *ena_dev,
        if (ret)
                goto error;
 
+       admin_queue->ena_dev = ena_dev;
        admin_queue->running_state = true;
 
        return 0;
@@ -1939,62 +1948,6 @@ int ena_com_get_link_params(struct ena_com_dev *ena_dev,
        return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0);
 }
 
-int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev)
-{
-       struct ena_admin_get_feat_resp resp;
-       struct ena_extra_properties_strings *extra_properties_strings =
-                       &ena_dev->extra_properties_strings;
-       u32 rc;
-       extra_properties_strings->size = ENA_ADMIN_EXTRA_PROPERTIES_COUNT *
-               ENA_ADMIN_EXTRA_PROPERTIES_STRING_LEN;
-
-       ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev,
-                              extra_properties_strings->size,
-                              extra_properties_strings->virt_addr,
-                              extra_properties_strings->dma_addr,
-                              extra_properties_strings->dma_handle);
-       if (unlikely(!extra_properties_strings->virt_addr)) {
-               ena_trc_err("Failed to allocate extra properties strings\n");
-               return 0;
-       }
-
-       rc = ena_com_get_feature_ex(ena_dev, &resp,
-                                   ENA_ADMIN_EXTRA_PROPERTIES_STRINGS,
-                                   extra_properties_strings->dma_addr,
-                                   extra_properties_strings->size, 0);
-       if (rc) {
-               ena_trc_dbg("Failed to get extra properties strings\n");
-               goto err;
-       }
-
-       return resp.u.extra_properties_strings.count;
-err:
-       ena_com_delete_extra_properties_strings(ena_dev);
-       return 0;
-}
-
-void ena_com_delete_extra_properties_strings(struct ena_com_dev *ena_dev)
-{
-       struct ena_extra_properties_strings *extra_properties_strings =
-                               &ena_dev->extra_properties_strings;
-
-       if (extra_properties_strings->virt_addr) {
-               ENA_MEM_FREE_COHERENT(ena_dev->dmadev,
-                                     extra_properties_strings->size,
-                                     extra_properties_strings->virt_addr,
-                                     extra_properties_strings->dma_addr,
-                                     extra_properties_strings->dma_handle);
-               extra_properties_strings->virt_addr = NULL;
-       }
-}
-
-int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev,
-                                      struct ena_admin_get_feat_resp *resp)
-{
-       return ena_com_get_feature(ena_dev, resp,
-                                  ENA_ADMIN_EXTRA_PROPERTIES_FLAGS, 0);
-}
-
 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
                              struct ena_com_dev_get_features_ctx *get_feat_ctx)
 {
@@ -2137,7 +2090,7 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data)
                timestamp = (u64)aenq_common->timestamp_low |
                        ((u64)aenq_common->timestamp_high << 32);
                ENA_TOUCH(timestamp); /* In case debug is disabled */
-               ena_trc_dbg("AENQ! Group[%x] Syndrom[%x] timestamp: [%"PRIu64"]\n",
+               ena_trc_dbg("AENQ! Group[%x] Syndrom[%x] timestamp: [%" ENA_PRIu64 "s]\n",
                            aenq_common->group,
                            aenq_common->syndrom,
                            timestamp);
@@ -2170,9 +2123,7 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data)
        mb();
        ENA_REG_WRITE32_RELAXED(dev->bus, (u32)aenq->head,
                                dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
-#ifndef MMIOWB_NOT_DEFINED
        mmiowb();
-#endif
 }
 
 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
@@ -2264,6 +2215,21 @@ static int ena_get_dev_stats(struct ena_com_dev *ena_dev,
        return ret;
 }
 
+int ena_com_get_eni_stats(struct ena_com_dev *ena_dev,
+                         struct ena_admin_eni_stats *stats)
+{
+       struct ena_com_stats_ctx ctx;
+       int ret;
+
+       memset(&ctx, 0x0, sizeof(ctx));
+       ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_ENI);
+       if (likely(ret == 0))
+               memcpy(stats, &ctx.get_resp.u.eni_stats,
+                      sizeof(ctx.get_resp.u.eni_stats));
+
+       return ret;
+}
+
 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
                                struct ena_admin_basic_stats *stats)
 {
@@ -2273,8 +2239,8 @@ int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
        memset(&ctx, 0x0, sizeof(ctx));
        ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_BASIC);
        if (likely(ret == 0))
-               memcpy(stats, &ctx.get_resp.basic_stats,
-                      sizeof(ctx.get_resp.basic_stats));
+               memcpy(stats, &ctx.get_resp.u.basic_stats,
+                      sizeof(ctx.get_resp.u.basic_stats));
 
        return ret;
 }
@@ -2451,15 +2417,15 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
 }
 
 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
-                             enum ena_admin_hash_functions *func,
-                             u8 *key)
+                             enum ena_admin_hash_functions *func)
 {
        struct ena_rss *rss = &ena_dev->rss;
        struct ena_admin_get_feat_resp get_resp;
-       struct ena_admin_feature_rss_flow_hash_control *hash_key =
-               rss->hash_key;
        int rc;
 
+       if (unlikely(!func))
+               return ENA_COM_INVAL;
+
        rc = ena_com_get_feature_ex(ena_dev, &get_resp,
                                    ENA_ADMIN_RSS_HASH_FUNCTION,
                                    rss->hash_key_dma_addr,
@@ -2467,13 +2433,20 @@ int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
        if (unlikely(rc))
                return rc;
 
-       /* ENA_FFS returns 1 in case the lsb is set */
+       /* ENA_FFS() returns 1 in case the lsb is set */
        rss->hash_func = ENA_FFS(get_resp.u.flow_hash_func.selected_func);
        if (rss->hash_func)
                rss->hash_func--;
 
-       if (func)
-               *func = rss->hash_func;
+       *func = rss->hash_func;
+
+       return 0;
+}
+
+int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key)
+{
+       struct ena_admin_feature_rss_flow_hash_control *hash_key =
+               ena_dev->rss.hash_key;
 
        if (key)
                memcpy(key, hash_key->key, (size_t)(hash_key->keys_num) << 2);
@@ -2735,10 +2708,6 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl)
        if (!ind_tbl)
                return 0;
 
-       rc = ena_com_ind_tbl_convert_from_device(ena_dev);
-       if (unlikely(rc))
-               return rc;
-
        for (i = 0; i < (1 << rss->tbl_log_size); i++)
                ind_tbl[i] = rss->host_rss_ind_tbl[i];
 
@@ -2755,12 +2724,16 @@ int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size)
        if (unlikely(rc))
                goto err_indr_tbl;
 
+       /* The following function might return unsupported in case the
+        * device doesn't support setting the key / hash function. We can safely
+        * ignore this error and have indirection table support only.
+        */
        rc = ena_com_hash_key_allocate(ena_dev);
-       if (unlikely(rc))
+       if (likely(!rc))
+               ena_com_hash_key_fill_default_key(ena_dev);
+       else if (rc != ENA_COM_UNSUPPORTED)
                goto err_hash_key;
 
-       ena_com_hash_key_fill_default_key(ena_dev);
-
        rc = ena_com_hash_ctrl_init(ena_dev);
        if (unlikely(rc))
                goto err_hash_ctrl;
@@ -2908,44 +2881,35 @@ bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev)
                                                  ENA_ADMIN_INTERRUPT_MODERATION);
 }
 
-int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
-                                                     u32 tx_coalesce_usecs)
+static int ena_com_update_nonadaptive_moderation_interval(u32 coalesce_usecs,
+                                                         u32 intr_delay_resolution,
+                                                         u32 *intr_moder_interval)
 {
-       if (!ena_dev->intr_delay_resolution) {
+       if (!intr_delay_resolution) {
                ena_trc_err("Illegal interrupt delay granularity value\n");
                return ENA_COM_FAULT;
        }
 
-       ena_dev->intr_moder_tx_interval = tx_coalesce_usecs /
-               ena_dev->intr_delay_resolution;
+       *intr_moder_interval = coalesce_usecs / intr_delay_resolution;
 
        return 0;
 }
 
-int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
-                                                     u32 rx_coalesce_usecs)
-{
-       if (!ena_dev->intr_delay_resolution) {
-               ena_trc_err("Illegal interrupt delay granularity value\n");
-               return ENA_COM_FAULT;
-       }
-
-       /* We use LOWEST entry of moderation table for storing
-        * nonadaptive interrupt coalescing values
-        */
-       ena_dev->intr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval =
-               rx_coalesce_usecs / ena_dev->intr_delay_resolution;
 
-       return 0;
+int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
+                                                     u32 tx_coalesce_usecs)
+{
+       return ena_com_update_nonadaptive_moderation_interval(tx_coalesce_usecs,
+                                                             ena_dev->intr_delay_resolution,
+                                                             &ena_dev->intr_moder_tx_interval);
 }
 
-void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev)
+int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
+                                                     u32 rx_coalesce_usecs)
 {
-       if (ena_dev->intr_moder_tbl)
-               ENA_MEM_FREE(ena_dev->dmadev,
-                            ena_dev->intr_moder_tbl,
-                            (sizeof(struct ena_intr_moder_entry) * ENA_INTR_MAX_NUM_OF_LEVELS));
-       ena_dev->intr_moder_tbl = NULL;
+       return ena_com_update_nonadaptive_moderation_interval(rx_coalesce_usecs,
+                                                             ena_dev->intr_delay_resolution,
+                                                             &ena_dev->intr_moder_rx_interval);
 }
 
 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)
@@ -2972,10 +2936,6 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)
                return rc;
        }
 
-       rc = ena_com_init_interrupt_moderation_table(ena_dev);
-       if (rc)
-               goto err;
-
        /* if moderation is supported by device we set adaptive moderation */
        delay_resolution = get_resp.u.intr_moderation.intr_delay_resolution;
        ena_com_update_intr_delay_resolution(ena_dev, delay_resolution);
@@ -2984,52 +2944,6 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)
        ena_com_disable_adaptive_moderation(ena_dev);
 
        return 0;
-err:
-       ena_com_destroy_interrupt_moderation(ena_dev);
-       return rc;
-}
-
-void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev)
-{
-       struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
-
-       if (!intr_moder_tbl)
-               return;
-
-       intr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval =
-               ENA_INTR_LOWEST_USECS;
-       intr_moder_tbl[ENA_INTR_MODER_LOWEST].pkts_per_interval =
-               ENA_INTR_LOWEST_PKTS;
-       intr_moder_tbl[ENA_INTR_MODER_LOWEST].bytes_per_interval =
-               ENA_INTR_LOWEST_BYTES;
-
-       intr_moder_tbl[ENA_INTR_MODER_LOW].intr_moder_interval =
-               ENA_INTR_LOW_USECS;
-       intr_moder_tbl[ENA_INTR_MODER_LOW].pkts_per_interval =
-               ENA_INTR_LOW_PKTS;
-       intr_moder_tbl[ENA_INTR_MODER_LOW].bytes_per_interval =
-               ENA_INTR_LOW_BYTES;
-
-       intr_moder_tbl[ENA_INTR_MODER_MID].intr_moder_interval =
-               ENA_INTR_MID_USECS;
-       intr_moder_tbl[ENA_INTR_MODER_MID].pkts_per_interval =
-               ENA_INTR_MID_PKTS;
-       intr_moder_tbl[ENA_INTR_MODER_MID].bytes_per_interval =
-               ENA_INTR_MID_BYTES;
-
-       intr_moder_tbl[ENA_INTR_MODER_HIGH].intr_moder_interval =
-               ENA_INTR_HIGH_USECS;
-       intr_moder_tbl[ENA_INTR_MODER_HIGH].pkts_per_interval =
-               ENA_INTR_HIGH_PKTS;
-       intr_moder_tbl[ENA_INTR_MODER_HIGH].bytes_per_interval =
-               ENA_INTR_HIGH_BYTES;
-
-       intr_moder_tbl[ENA_INTR_MODER_HIGHEST].intr_moder_interval =
-               ENA_INTR_HIGHEST_USECS;
-       intr_moder_tbl[ENA_INTR_MODER_HIGHEST].pkts_per_interval =
-               ENA_INTR_HIGHEST_PKTS;
-       intr_moder_tbl[ENA_INTR_MODER_HIGHEST].bytes_per_interval =
-               ENA_INTR_HIGHEST_BYTES;
 }
 
 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev)
@@ -3039,57 +2953,15 @@ unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *
 
 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev)
 {
-       struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
-
-       if (intr_moder_tbl)
-               return intr_moder_tbl[ENA_INTR_MODER_LOWEST].intr_moder_interval;
-
-       return 0;
-}
-
-void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
-                                       enum ena_intr_moder_level level,
-                                       struct ena_intr_moder_entry *entry)
-{
-       struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
-
-       if (level >= ENA_INTR_MAX_NUM_OF_LEVELS)
-               return;
-
-       intr_moder_tbl[level].intr_moder_interval = entry->intr_moder_interval;
-       if (ena_dev->intr_delay_resolution)
-               intr_moder_tbl[level].intr_moder_interval /=
-                       ena_dev->intr_delay_resolution;
-       intr_moder_tbl[level].pkts_per_interval = entry->pkts_per_interval;
-
-       /* use hardcoded value until ethtool supports bytecount parameter */
-       if (entry->bytes_per_interval != ENA_INTR_BYTE_COUNT_NOT_SUPPORTED)
-               intr_moder_tbl[level].bytes_per_interval = entry->bytes_per_interval;
-}
-
-void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
-                                      enum ena_intr_moder_level level,
-                                      struct ena_intr_moder_entry *entry)
-{
-       struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
-
-       if (level >= ENA_INTR_MAX_NUM_OF_LEVELS)
-               return;
-
-       entry->intr_moder_interval = intr_moder_tbl[level].intr_moder_interval;
-       if (ena_dev->intr_delay_resolution)
-               entry->intr_moder_interval *= ena_dev->intr_delay_resolution;
-       entry->pkts_per_interval =
-       intr_moder_tbl[level].pkts_per_interval;
-       entry->bytes_per_interval = intr_moder_tbl[level].bytes_per_interval;
+       return ena_dev->intr_moder_rx_interval;
 }
 
 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
                            struct ena_admin_feature_llq_desc *llq_features,
                            struct ena_llq_configurations *llq_default_cfg)
 {
+       struct ena_com_llq_info *llq_info = &ena_dev->llq_info;
        int rc;
-       struct ena_com_llq_info *llq_info = &(ena_dev->llq_info);;
 
        if (!llq_features->max_llq_num) {
                ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
@@ -3103,7 +2975,7 @@ int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
        ena_dev->tx_max_header_size = llq_info->desc_list_entry_size -
                (llq_info->descs_num_before_header * sizeof(struct ena_eth_io_tx_desc));
 
-       if (ena_dev->tx_max_header_size == 0) {
+       if (unlikely(ena_dev->tx_max_header_size == 0)) {
                ena_trc_err("the size of the LLQ entry is smaller than needed\n");
                return -EINVAL;
        }