net/bnxt: add dpool allocator for EM allocation
[dpdk.git] / drivers / net / ena / base / ena_eth_com.c
index 9c4e613..92a9a10 100644 (file)
@@ -57,12 +57,14 @@ static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,
 
        if (is_llq_max_tx_burst_exists(io_sq)) {
                if (unlikely(!io_sq->entries_in_tx_burst_left)) {
-                       ena_trc_err("Error: trying to send more packets than tx burst allows\n");
+                       ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                                   "Error: trying to send more packets than tx burst allows\n");
                        return ENA_COM_NO_SPACE;
                }
 
                io_sq->entries_in_tx_burst_left--;
-               ena_trc_dbg("decreasing entries_in_tx_burst_left of queue %d to %d\n",
+               ena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Decreasing entries_in_tx_burst_left of queue %d to %d\n",
                            io_sq->qid, io_sq->entries_in_tx_burst_left);
        }
 
@@ -101,12 +103,14 @@ static int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,
                llq_info->descs_num_before_header * io_sq->desc_entry_size;
 
        if (unlikely((header_offset + header_len) >  llq_info->desc_list_entry_size)) {
-               ena_trc_err("trying to write header larger than llq entry can accommodate\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Trying to write header larger than llq entry can accommodate\n");
                return ENA_COM_FAULT;
        }
 
        if (unlikely(!bounce_buffer)) {
-               ena_trc_err("bounce buffer is NULL\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Bounce buffer is NULL\n");
                return ENA_COM_FAULT;
        }
 
@@ -124,7 +128,8 @@ static void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)
        bounce_buffer = pkt_ctrl->curr_bounce_buf;
 
        if (unlikely(!bounce_buffer)) {
-               ena_trc_err("bounce buffer is NULL\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Bounce buffer is NULL\n");
                return NULL;
        }
 
@@ -149,7 +154,8 @@ static int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)
                rc = ena_com_write_bounce_buffer_to_dev(io_sq,
                                                        pkt_ctrl->curr_bounce_buf);
                if (unlikely(rc)) {
-                       ena_trc_err("failed to write bounce buffer to device\n");
+                       ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                                   "Failed to write bounce buffer to device\n");
                        return rc;
                }
 
@@ -182,7 +188,8 @@ static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)
                rc = ena_com_write_bounce_buffer_to_dev(io_sq,
                                                        pkt_ctrl->curr_bounce_buf);
                if (unlikely(rc)) {
-                       ena_trc_err("failed to write bounce buffer to device\n");
+                       ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                                   "Failed to write bounce buffer to device\n");
                        return rc;
                }
 
@@ -252,7 +259,8 @@ static u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
                io_cq->cur_rx_pkt_cdesc_count = 0;
                io_cq->cur_rx_pkt_cdesc_start_idx = head_masked;
 
-               ena_trc_dbg("ena q_id: %d packets were completed. first desc idx %u descs# %d\n",
+               ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
+                           "ENA q_id: %d packets were completed. first desc idx %u descs# %d\n",
                            io_cq->qid, *first_cdesc_idx, count);
        } else {
                io_cq->cur_rx_pkt_cdesc_count += count;
@@ -268,6 +276,9 @@ static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
        struct ena_eth_io_tx_meta_desc *meta_desc = NULL;
 
        meta_desc = get_sq_desc(io_sq);
+       if (unlikely(!meta_desc))
+               return ENA_COM_FAULT;
+
        memset(meta_desc, 0x0, sizeof(struct ena_eth_io_tx_meta_desc));
 
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_DESC_MASK;
@@ -275,7 +286,7 @@ static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;
 
        /* bits 0-9 of the mss */
-       meta_desc->word2 |= (ena_meta->mss <<
+       meta_desc->word2 |= ((u32)ena_meta->mss <<
                ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;
        /* bits 10-13 of the mss */
@@ -285,7 +296,7 @@ static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
 
        /* Extended meta desc */
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;
-       meta_desc->len_ctrl |= (io_sq->phase <<
+       meta_desc->len_ctrl |= ((u32)io_sq->phase <<
                ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_PHASE_MASK;
 
@@ -298,7 +309,7 @@ static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
                ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;
 
-       meta_desc->word2 |= (ena_meta->l4_hdr_len <<
+       meta_desc->word2 |= ((u32)ena_meta->l4_hdr_len <<
                ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;
 
@@ -320,20 +331,23 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
 
                *have_meta = true;
                return ena_com_create_meta(io_sq, ena_meta);
-       } else if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {
+       }
+
+       if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {
                *have_meta = true;
                /* Cache the meta desc */
                memcpy(&io_sq->cached_tx_meta, ena_meta,
                       sizeof(struct ena_com_tx_meta));
                return ena_com_create_meta(io_sq, ena_meta);
-       } else {
-               *have_meta = false;
-               return ENA_COM_OK;
        }
+
+       *have_meta = false;
+       return ENA_COM_OK;
 }
 
-static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
-                                       struct ena_eth_io_rx_cdesc_base *cdesc)
+static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,
+                                struct ena_com_rx_ctx *ena_rx_ctx,
+                                struct ena_eth_io_rx_cdesc_base *cdesc)
 {
        ena_rx_ctx->l3_proto = cdesc->status &
                ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK;
@@ -354,7 +368,8 @@ static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
                (cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK) >>
                ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT;
 
-       ena_trc_dbg("ena_rx_ctx->l3_proto %d ena_rx_ctx->l4_proto %d\nena_rx_ctx->l3_csum_err %d ena_rx_ctx->l4_csum_err %d\nhash frag %d frag: %d cdesc_status: %x\n",
+       ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
+                   "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %d frag %d cdesc_status %x\n",
                    ena_rx_ctx->l3_proto,
                    ena_rx_ctx->l4_proto,
                    ena_rx_ctx->l3_csum_err,
@@ -383,23 +398,26 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        u64 addr_hi;
 
        ENA_WARN(io_sq->direction != ENA_COM_IO_QUEUE_DIRECTION_TX,
-                "wrong Q type");
+                ena_com_io_sq_to_ena_dev(io_sq), "wrong Q type");
 
        /* num_bufs +1 for potential meta desc */
        if (unlikely(!ena_com_sq_have_enough_space(io_sq, num_bufs + 1))) {
-               ena_trc_dbg("Not enough space in the tx queue\n");
+               ena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Not enough space in the tx queue\n");
                return ENA_COM_NO_MEM;
        }
 
        if (unlikely(header_len > io_sq->tx_max_header_size)) {
-               ena_trc_err("header size is too large %d max header: %d\n",
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Header size is too large %d max header: %d\n",
                            header_len, io_sq->tx_max_header_size);
                return ENA_COM_INVAL;
        }
 
        if (unlikely(io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV
                     && !buffer_to_push)) {
-               ena_trc_err("push header wasn't provided on LLQ mode\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Push header wasn't provided on LLQ mode\n");
                return ENA_COM_INVAL;
        }
 
@@ -409,7 +427,8 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 
        rc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx, &have_meta);
        if (unlikely(rc)) {
-               ena_trc_err("failed to create and store tx meta desc\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Failed to create and store tx meta desc\n");
                return rc;
        }
 
@@ -417,7 +436,8 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        if (unlikely(!num_bufs && !header_len)) {
                rc = ena_com_close_bounce_buffer(io_sq);
                if (rc)
-                       ena_trc_err("failed to write buffers to LLQ\n");
+                       ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                                   "Failed to write buffers to LLQ\n");
                *nb_hw_desc = io_sq->tail - start_tail;
                return rc;
        }
@@ -431,16 +451,16 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        if (!have_meta)
                desc->len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK;
 
-       desc->buff_addr_hi_hdr_sz |= (header_len <<
+       desc->buff_addr_hi_hdr_sz |= ((u32)header_len <<
                ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) &
                ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;
-       desc->len_ctrl |= (io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
+       desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
                ENA_ETH_IO_TX_DESC_PHASE_MASK;
 
        desc->len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;
 
        /* Bits 0-9 */
-       desc->meta_ctrl |= (ena_tx_ctx->req_id <<
+       desc->meta_ctrl |= ((u32)ena_tx_ctx->req_id <<
                ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) &
                ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;
 
@@ -478,7 +498,8 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
                if (likely(i != 0)) {
                        rc = ena_com_sq_update_tail(io_sq);
                        if (unlikely(rc)) {
-                               ena_trc_err("failed to update sq tail\n");
+                               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                                           "Failed to update sq tail\n");
                                return rc;
                        }
 
@@ -488,7 +509,7 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 
                        memset(desc, 0x0, sizeof(struct ena_eth_io_tx_desc));
 
-                       desc->len_ctrl |= (io_sq->phase <<
+                       desc->len_ctrl |= ((u32)io_sq->phase <<
                                ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
                                ENA_ETH_IO_TX_DESC_PHASE_MASK;
                }
@@ -510,13 +531,15 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 
        rc = ena_com_sq_update_tail(io_sq);
        if (unlikely(rc)) {
-               ena_trc_err("failed to update sq tail of the last descriptor\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Failed to update sq tail of the last descriptor\n");
                return rc;
        }
 
        rc = ena_com_close_bounce_buffer(io_sq);
        if (rc)
-               ena_trc_err("failed when closing bounce buffer\n");
+               ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq),
+                           "Failed when closing bounce buffer\n");
 
        *nb_hw_desc = io_sq->tail - start_tail;
        return rc;
@@ -528,12 +551,13 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
 {
        struct ena_com_rx_buf_info *ena_buf = &ena_rx_ctx->ena_bufs[0];
        struct ena_eth_io_rx_cdesc_base *cdesc = NULL;
+       u16 q_depth = io_cq->q_depth;
        u16 cdesc_idx = 0;
        u16 nb_hw_desc;
        u16 i = 0;
 
        ENA_WARN(io_cq->direction != ENA_COM_IO_QUEUE_DIRECTION_RX,
-                "wrong Q type");
+                ena_com_io_cq_to_ena_dev(io_cq), "wrong Q type");
 
        nb_hw_desc = ena_com_cdesc_rx_pkt_get(io_cq, &cdesc_idx);
        if (nb_hw_desc == 0) {
@@ -541,11 +565,13 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
                return 0;
        }
 
-       ena_trc_dbg("fetch rx packet: queue %d completed desc: %d\n",
+       ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
+                   "Fetch rx packet: queue %d completed desc: %d\n",
                    io_cq->qid, nb_hw_desc);
 
        if (unlikely(nb_hw_desc > ena_rx_ctx->max_bufs)) {
-               ena_trc_err("Too many RX cdescs (%d) > MAX(%d)\n",
+               ena_trc_err(ena_com_io_cq_to_ena_dev(io_cq),
+                           "Too many RX cdescs (%d) > MAX(%d)\n",
                            nb_hw_desc, ena_rx_ctx->max_bufs);
                return ENA_COM_NO_SPACE;
        }
@@ -554,21 +580,30 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
        ena_rx_ctx->pkt_offset = cdesc->offset;
 
        do {
-               ena_buf->len = cdesc->length;
-               ena_buf->req_id = cdesc->req_id;
-               ena_buf++;
-       } while ((++i < nb_hw_desc) && (cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i)));
+               ena_buf[i].len = cdesc->length;
+               ena_buf[i].req_id = cdesc->req_id;
+               if (unlikely(ena_buf[i].req_id >= q_depth))
+                       return ENA_COM_EIO;
+
+               if (++i >= nb_hw_desc)
+                       break;
+
+               cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i);
+
+       } while (1);
 
        /* Update SQ head ptr */
        io_sq->next_to_comp += nb_hw_desc;
 
-       ena_trc_dbg("[%s][QID#%d] Updating SQ head to: %d\n", __func__,
+       ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq),
+                   "[%s][QID#%d] Updating SQ head to: %d\n", __func__,
                    io_sq->qid, io_sq->next_to_comp);
 
        /* Get rx flags from the last pkt */
-       ena_com_rx_set_flags(ena_rx_ctx, cdesc);
+       ena_com_rx_set_flags(io_cq, ena_rx_ctx, cdesc);
 
        ena_rx_ctx->descs = nb_hw_desc;
+
        return 0;
 }
 
@@ -579,7 +614,7 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,
        struct ena_eth_io_rx_desc *desc;
 
        ENA_WARN(io_sq->direction != ENA_COM_IO_QUEUE_DIRECTION_RX,
-                "wrong Q type");
+                ena_com_io_sq_to_ena_dev(io_sq), "wrong Q type");
 
        if (unlikely(!ena_com_sq_have_enough_space(io_sq, 1)))
                return ENA_COM_NO_SPACE;
@@ -593,12 +628,16 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,
        desc->length = ena_buf->len;
 
        desc->ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK |
-               ENA_ETH_IO_RX_DESC_LAST_MASK |
-               (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK) |
-               ENA_ETH_IO_RX_DESC_COMP_REQ_MASK;
+                    ENA_ETH_IO_RX_DESC_LAST_MASK |
+                    ENA_ETH_IO_RX_DESC_COMP_REQ_MASK |
+                    (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK);
 
        desc->req_id = req_id;
 
+       ena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq),
+                   "[%s] Adding single RX desc, Queue: %u, req_id: %u\n",
+                   __func__, io_sq->qid, req_id);
+
        desc->buff_addr_lo = (u32)ena_buf->paddr;
        desc->buff_addr_hi =
                ((ena_buf->paddr & GENMASK_ULL(io_sq->dma_addr_bits - 1, 32)) >> 32);