net/txgbe: support ntuple filter add and delete
[dpdk.git] / drivers / net / ena / base / ena_eth_com.c
index d4d4422..a35d92f 100644 (file)
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
+ * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
  * All rights reserved.
  */
 
@@ -148,8 +148,10 @@ static int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)
        if (pkt_ctrl->idx) {
                rc = ena_com_write_bounce_buffer_to_dev(io_sq,
                                                        pkt_ctrl->curr_bounce_buf);
-               if (unlikely(rc))
+               if (unlikely(rc)) {
+                       ena_trc_err("failed to write bounce buffer to device\n");
                        return rc;
+               }
 
                pkt_ctrl->curr_bounce_buf =
                        ena_com_get_next_bounce_buffer(&io_sq->bounce_buf_ctrl);
@@ -179,13 +181,15 @@ static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)
        if (!pkt_ctrl->descs_left_in_line) {
                rc = ena_com_write_bounce_buffer_to_dev(io_sq,
                                                        pkt_ctrl->curr_bounce_buf);
-               if (unlikely(rc))
+               if (unlikely(rc)) {
+                       ena_trc_err("failed to write bounce buffer to device\n");
                        return rc;
+               }
 
                pkt_ctrl->curr_bounce_buf =
                        ena_com_get_next_bounce_buffer(&io_sq->bounce_buf_ctrl);
-                       memset(io_sq->llq_buf_ctrl.curr_bounce_buf,
-                              0x0, llq_info->desc_list_entry_size);
+               memset(io_sq->llq_buf_ctrl.curr_bounce_buf,
+                      0x0, llq_info->desc_list_entry_size);
 
                pkt_ctrl->idx = 0;
                if (unlikely(llq_info->desc_stride_ctrl == ENA_ADMIN_SINGLE_DESC_PER_ENTRY))
@@ -258,13 +262,15 @@ static u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
        return count;
 }
 
-static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
-                                                       struct ena_com_tx_ctx *ena_tx_ctx)
+static int ena_com_create_meta(struct ena_com_io_sq *io_sq,
+                              struct ena_com_tx_meta *ena_meta)
 {
        struct ena_eth_io_tx_meta_desc *meta_desc = NULL;
-       struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
 
        meta_desc = get_sq_desc(io_sq);
+       if (unlikely(!meta_desc))
+               return ENA_COM_FAULT;
+
        memset(meta_desc, 0x0, sizeof(struct ena_eth_io_tx_meta_desc));
 
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_DESC_MASK;
@@ -272,7 +278,7 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;
 
        /* bits 0-9 of the mss */
-       meta_desc->word2 |= (ena_meta->mss <<
+       meta_desc->word2 |= ((u32)ena_meta->mss <<
                ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;
        /* bits 10-13 of the mss */
@@ -282,29 +288,51 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
 
        /* Extended meta desc */
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;
-       meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;
-       meta_desc->len_ctrl |= (io_sq->phase <<
+       meta_desc->len_ctrl |= ((u32)io_sq->phase <<
                ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_PHASE_MASK;
 
        meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK;
+       meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;
+
        meta_desc->word2 |= ena_meta->l3_hdr_len &
                ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;
        meta_desc->word2 |= (ena_meta->l3_hdr_offset <<
                ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;
 
-       meta_desc->word2 |= (ena_meta->l4_hdr_len <<
+       meta_desc->word2 |= ((u32)ena_meta->l4_hdr_len <<
                ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) &
                ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;
 
-       meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;
+       return ena_com_sq_update_tail(io_sq);
+}
 
-       /* Cached the meta desc */
-       memcpy(&io_sq->cached_tx_meta, ena_meta,
-              sizeof(struct ena_com_tx_meta));
+static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
+                                                struct ena_com_tx_ctx *ena_tx_ctx,
+                                                bool *have_meta)
+{
+       struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
 
-       return ena_com_sq_update_tail(io_sq);
+       /* When disable meta caching is set, don't bother to save the meta and
+        * compare it to the stored version, just create the meta
+        */
+       if (io_sq->disable_meta_caching) {
+               if (unlikely(!ena_tx_ctx->meta_valid))
+                       return ENA_COM_INVAL;
+
+               *have_meta = true;
+               return ena_com_create_meta(io_sq, ena_meta);
+       } else if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {
+               *have_meta = true;
+               /* Cache the meta desc */
+               memcpy(&io_sq->cached_tx_meta, ena_meta,
+                      sizeof(struct ena_com_tx_meta));
+               return ena_com_create_meta(io_sq, ena_meta);
+       } else {
+               *have_meta = false;
+               return ENA_COM_OK;
+       }
 }
 
 static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
@@ -373,24 +401,26 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        }
 
        if (unlikely(io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV
-                    && !buffer_to_push))
+                    && !buffer_to_push)) {
+               ena_trc_err("push header wasn't provided on LLQ mode\n");
                return ENA_COM_INVAL;
+       }
 
        rc = ena_com_write_header_to_bounce(io_sq, buffer_to_push, header_len);
        if (unlikely(rc))
                return rc;
 
-       have_meta = ena_tx_ctx->meta_valid && ena_com_meta_desc_changed(io_sq,
-                       ena_tx_ctx);
-       if (have_meta) {
-               rc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx);
-               if (unlikely(rc))
-                       return rc;
+       rc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx, &have_meta);
+       if (unlikely(rc)) {
+               ena_trc_err("failed to create and store tx meta desc\n");
+               return rc;
        }
 
        /* If the caller doesn't want to send packets */
        if (unlikely(!num_bufs && !header_len)) {
                rc = ena_com_close_bounce_buffer(io_sq);
+               if (rc)
+                       ena_trc_err("failed to write buffers to LLQ\n");
                *nb_hw_desc = io_sq->tail - start_tail;
                return rc;
        }
@@ -404,16 +434,16 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        if (!have_meta)
                desc->len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK;
 
-       desc->buff_addr_hi_hdr_sz |= (header_len <<
+       desc->buff_addr_hi_hdr_sz |= ((u32)header_len <<
                ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) &
                ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;
-       desc->len_ctrl |= (io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
+       desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
                ENA_ETH_IO_TX_DESC_PHASE_MASK;
 
        desc->len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;
 
        /* Bits 0-9 */
-       desc->meta_ctrl |= (ena_tx_ctx->req_id <<
+       desc->meta_ctrl |= ((u32)ena_tx_ctx->req_id <<
                ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) &
                ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;
 
@@ -450,8 +480,10 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
                /* The first desc share the same desc as the header */
                if (likely(i != 0)) {
                        rc = ena_com_sq_update_tail(io_sq);
-                       if (unlikely(rc))
+                       if (unlikely(rc)) {
+                               ena_trc_err("failed to update sq tail\n");
                                return rc;
+                       }
 
                        desc = get_sq_desc(io_sq);
                        if (unlikely(!desc))
@@ -459,7 +491,7 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
 
                        memset(desc, 0x0, sizeof(struct ena_eth_io_tx_desc));
 
-                       desc->len_ctrl |= (io_sq->phase <<
+                       desc->len_ctrl |= ((u32)io_sq->phase <<
                                ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &
                                ENA_ETH_IO_TX_DESC_PHASE_MASK;
                }
@@ -480,10 +512,14 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,
        desc->len_ctrl |= ENA_ETH_IO_TX_DESC_LAST_MASK;
 
        rc = ena_com_sq_update_tail(io_sq);
-       if (unlikely(rc))
+       if (unlikely(rc)) {
+               ena_trc_err("failed to update sq tail of the last descriptor\n");
                return rc;
+       }
 
        rc = ena_com_close_bounce_buffer(io_sq);
+       if (rc)
+               ena_trc_err("failed when closing bounce buffer\n");
 
        *nb_hw_desc = io_sq->tail - start_tail;
        return rc;
@@ -521,10 +557,15 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,
        ena_rx_ctx->pkt_offset = cdesc->offset;
 
        do {
-               ena_buf->len = cdesc->length;
-               ena_buf->req_id = cdesc->req_id;
-               ena_buf++;
-       } while ((++i < nb_hw_desc) && (cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i)));
+               ena_buf[i].len = cdesc->length;
+               ena_buf[i].req_id = cdesc->req_id;
+
+               if (++i >= nb_hw_desc)
+                       break;
+
+               cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i);
+
+       } while (1);
 
        /* Update SQ head ptr */
        io_sq->next_to_comp += nb_hw_desc;