#include <ena_eth_io_defs.h>
#define DRV_MODULE_VER_MAJOR 2
-#define DRV_MODULE_VER_MINOR 5
+#define DRV_MODULE_VER_MINOR 6
#define DRV_MODULE_VER_SUBMINOR 0
#define __MERGE_64B_H_L(h, l) (((uint64_t)h << 32) | l)
/* Device arguments */
#define ENA_DEVARG_LARGE_LLQ_HDR "large_llq_hdr"
+/* Timeout in seconds after which a single uncompleted Tx packet should be
+ * considered as a missing.
+ */
+#define ENA_DEVARG_MISS_TXC_TO "miss_txc_to"
/*
* Each rte_memzone should have unique name.
}),
struct ena_com_dev *ena_dev, u32 *ind_tbl);
+static inline void ena_trigger_reset(struct ena_adapter *adapter,
+ enum ena_regs_reset_reason_types reason)
+{
+ if (likely(!adapter->trigger_reset)) {
+ adapter->reset_reason = reason;
+ adapter->trigger_reset = true;
+ }
+}
+
static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
struct rte_mbuf *mbuf,
struct ena_com_rx_ctx *ena_rx_ctx,
} else {
if (unlikely(ena_rx_ctx->l4_csum_err)) {
++rx_stats->l4_csum_bad;
- ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
+ /*
+ * For the L4 Rx checksum offload the HW may indicate
+ * bad checksum although it's valid. Because of that,
+ * we're setting the UNKNOWN flag to let the app
+ * re-verify the checksum.
+ */
+ ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
} else {
++rx_stats->l4_csum_good;
ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
if (mbuf->ol_flags & RTE_MBUF_F_TX_IPV6) {
ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
+ /* For the IPv6 packets, DF always needs to be true. */
+ ena_tx_ctx->df = 1;
} else {
ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
if (mbuf->packet_type &
(RTE_PTYPE_L4_NONFRAG
| RTE_PTYPE_INNER_L4_NONFRAG))
- ena_tx_ctx->df = true;
+ ena_tx_ctx->df = 1;
}
/* check if L4 checksum is needed */
}
if (tx_info)
- PMD_TX_LOG(ERR, "tx_info doesn't have valid mbuf\n");
+ PMD_TX_LOG(ERR, "tx_info doesn't have valid mbuf. queue %d:%d req_id %u\n",
+ tx_ring->port_id, tx_ring->id, req_id);
else
- PMD_TX_LOG(ERR, "Invalid req_id: %hu\n", req_id);
+ PMD_TX_LOG(ERR, "Invalid req_id: %hu in queue %d:%d\n",
+ req_id, tx_ring->port_id, tx_ring->id);
/* Trigger device reset */
++tx_ring->tx_stats.bad_req_id;
- tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
- tx_ring->adapter->trigger_reset = true;
+ ena_trigger_reset(tx_ring->adapter, ENA_REGS_RESET_INV_TX_REQ_ID);
return -EFAULT;
}
if (unlikely((rte_get_timer_cycles() - adapter->timestamp_wd) >=
adapter->keep_alive_timeout)) {
PMD_DRV_LOG(ERR, "Keep alive timeout\n");
- adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
- adapter->trigger_reset = true;
+ ena_trigger_reset(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO);
++adapter->dev_stats.wd_expired;
}
}
{
if (unlikely(!ena_com_get_admin_running_state(&adapter->ena_dev))) {
PMD_DRV_LOG(ERR, "ENA admin queue is not in running state\n");
- adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
- adapter->trigger_reset = true;
+ ena_trigger_reset(adapter, ENA_REGS_RESET_ADMIN_TO);
}
}
return 0;
}
+ if (adapter->dev_mem_base == NULL) {
+ PMD_DRV_LOG(ERR,
+ "LLQ is advertised as supported, but device doesn't expose mem bar\n");
+ ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
+ return 0;
+ }
+
rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
if (unlikely(rc)) {
PMD_INIT_LOG(WARNING,
if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
return 0;
- if (!adapter->dev_mem_base) {
- PMD_DRV_LOG(ERR,
- "Unable to access LLQ BAR resource. Fallback to host mode policy.\n");
- ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
- return 0;
- }
-
ena_dev->mem_bar = adapter->dev_mem_base;
return 0;
snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d",
adapter->id_number);
+ adapter->missing_tx_completion_to = ENA_TX_TIMEOUT;
+
rc = ena_parse_devargs(adapter, pci_dev->device.devargs);
if (rc != 0) {
PMD_INIT_LOG(CRIT, "Failed to parse devargs\n");
adapter->missing_tx_completion_budget =
RTE_MIN(ENA_MONITORED_TX_QUEUES, dev->data->nb_tx_queues);
- adapter->missing_tx_completion_to = ENA_TX_TIMEOUT;
/* To avoid detection of the spurious Tx completion timeout due to
* application not calling the Tx cleanup function, set timeout for the
* Tx queue which should be half of the missing completion timeout for a
rc);
if (rc == ENA_COM_NO_SPACE) {
++rx_ring->rx_stats.bad_desc_num;
- rx_ring->adapter->reset_reason =
- ENA_REGS_RESET_TOO_MANY_RX_DESCS;
+ ena_trigger_reset(rx_ring->adapter,
+ ENA_REGS_RESET_TOO_MANY_RX_DESCS);
} else {
++rx_ring->rx_stats.bad_req_id;
- rx_ring->adapter->reset_reason =
- ENA_REGS_RESET_INV_RX_REQ_ID;
+ ena_trigger_reset(rx_ring->adapter,
+ ENA_REGS_RESET_INV_RX_REQ_ID);
}
- rx_ring->adapter->trigger_reset = true;
return 0;
}
adapter->ena_dev.mmio_read.reg_read_to =
hints->mmio_read_timeout * 1000;
- if (hints->missing_tx_completion_timeout) {
- if (hints->missing_tx_completion_timeout ==
- ENA_HW_HINTS_NO_TIMEOUT) {
- adapter->missing_tx_completion_to =
- ENA_HW_HINTS_NO_TIMEOUT;
- } else {
- /* Convert from msecs to ticks */
- adapter->missing_tx_completion_to = rte_get_timer_hz() *
- hints->missing_tx_completion_timeout / 1000;
- adapter->tx_cleanup_stall_delay =
- adapter->missing_tx_completion_to / 2;
- }
- }
-
if (hints->driver_watchdog_timeout) {
if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
if (unlikely(rc)) {
PMD_DRV_LOG(ERR, "Failed to prepare Tx buffers, rc: %d\n", rc);
++tx_ring->tx_stats.prepare_ctx_err;
- tx_ring->adapter->reset_reason =
- ENA_REGS_RESET_DRIVER_INVALID_STATE;
- tx_ring->adapter->trigger_reset = true;
+ ena_trigger_reset(tx_ring->adapter,
+ ENA_REGS_RESET_DRIVER_INVALID_STATE);
return rc;
}
return valid;
}
+static int ena_process_uint_devarg(const char *key,
+ const char *value,
+ void *opaque)
+{
+ struct ena_adapter *adapter = opaque;
+ char *str_end;
+ uint64_t uint_value;
+
+ uint_value = strtoull(value, &str_end, 10);
+ if (value == str_end) {
+ PMD_INIT_LOG(ERR,
+ "Invalid value for key '%s'. Only uint values are accepted.\n",
+ key);
+ return -EINVAL;
+ }
+
+ if (strcmp(key, ENA_DEVARG_MISS_TXC_TO) == 0) {
+ if (uint_value > ENA_MAX_TX_TIMEOUT_SECONDS) {
+ PMD_INIT_LOG(ERR,
+ "Tx timeout too high: %" PRIu64 " sec. Maximum allowed: %d sec.\n",
+ uint_value, ENA_MAX_TX_TIMEOUT_SECONDS);
+ return -EINVAL;
+ } else if (uint_value == 0) {
+ PMD_INIT_LOG(INFO,
+ "Check for missing Tx completions has been disabled.\n");
+ adapter->missing_tx_completion_to =
+ ENA_HW_HINTS_NO_TIMEOUT;
+ } else {
+ PMD_INIT_LOG(INFO,
+ "Tx packet completion timeout set to %" PRIu64 " seconds.\n",
+ uint_value);
+ adapter->missing_tx_completion_to =
+ uint_value * rte_get_timer_hz();
+ }
+ }
+
+ return 0;
+}
+
static int ena_process_bool_devarg(const char *key,
const char *value,
void *opaque)
{
static const char * const allowed_args[] = {
ENA_DEVARG_LARGE_LLQ_HDR,
+ ENA_DEVARG_MISS_TXC_TO,
NULL,
};
struct rte_kvargs *kvlist;
rc = rte_kvargs_process(kvlist, ENA_DEVARG_LARGE_LLQ_HDR,
ena_process_bool_devarg, adapter);
+ if (rc != 0)
+ goto exit;
+ rc = rte_kvargs_process(kvlist, ENA_DEVARG_MISS_TXC_TO,
+ ena_process_uint_devarg, adapter);
+exit:
rte_kvargs_free(kvlist);
return rc;
git.droids-corp.org / dpdk.git / blobdiff