#include <ena_eth_io_defs.h>
#define DRV_MODULE_VER_MAJOR 2
-#define DRV_MODULE_VER_MINOR 5
+#define DRV_MODULE_VER_MINOR 6
#define DRV_MODULE_VER_SUBMINOR 0
#define __MERGE_64B_H_L(h, l) (((uint64_t)h << 32) | l)
/* Device arguments */
#define ENA_DEVARG_LARGE_LLQ_HDR "large_llq_hdr"
+/* Timeout in seconds after which a single uncompleted Tx packet should be
+ * considered as a missing.
+ */
+#define ENA_DEVARG_MISS_TXC_TO "miss_txc_to"
/*
* Each rte_memzone should have unique name.
ENA_STAT_RX_ENTRY(cnt),
ENA_STAT_RX_ENTRY(bytes),
ENA_STAT_RX_ENTRY(refill_partial),
- ENA_STAT_RX_ENTRY(bad_csum),
+ ENA_STAT_RX_ENTRY(l3_csum_bad),
+ ENA_STAT_RX_ENTRY(l4_csum_bad),
+ ENA_STAT_RX_ENTRY(l4_csum_good),
ENA_STAT_RX_ENTRY(mbuf_alloc_fail),
ENA_STAT_RX_ENTRY(bad_desc_num),
ENA_STAT_RX_ENTRY(bad_req_id),
static struct ena_aenq_handlers aenq_handlers;
-static int ena_device_init(struct ena_com_dev *ena_dev,
+static int ena_device_init(struct ena_adapter *adapter,
struct rte_pci_device *pdev,
- struct ena_com_dev_get_features_ctx *get_feat_ctx,
- bool *wd_state);
+ struct ena_com_dev_get_features_ctx *get_feat_ctx);
static int ena_dev_configure(struct rte_eth_dev *dev);
static void ena_tx_map_mbuf(struct ena_ring *tx_ring,
struct ena_tx_buffer *tx_info,
void **push_header,
uint16_t *header_len);
static int ena_xmit_mbuf(struct ena_ring *tx_ring, struct rte_mbuf *mbuf);
-static void ena_tx_cleanup(struct ena_ring *tx_ring);
+static int ena_tx_cleanup(void *txp, uint32_t free_pkt_cnt);
static uint16_t eth_ena_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
static uint16_t eth_ena_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
static int ena_xstats_get_names(struct rte_eth_dev *dev,
struct rte_eth_xstat_name *xstats_names,
unsigned int n);
+static int ena_xstats_get_names_by_id(struct rte_eth_dev *dev,
+ const uint64_t *ids,
+ struct rte_eth_xstat_name *xstats_names,
+ unsigned int size);
static int ena_xstats_get(struct rte_eth_dev *dev,
struct rte_eth_xstat *stats,
unsigned int n);
void *opaque);
static int ena_parse_devargs(struct ena_adapter *adapter,
struct rte_devargs *devargs);
-static int ena_copy_eni_stats(struct ena_adapter *adapter);
+static int ena_copy_eni_stats(struct ena_adapter *adapter,
+ struct ena_stats_eni *stats);
static int ena_setup_rx_intr(struct rte_eth_dev *dev);
static int ena_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id);
static int ena_rx_queue_intr_disable(struct rte_eth_dev *dev,
uint16_t queue_id);
+static int ena_configure_aenq(struct ena_adapter *adapter);
+static int ena_mp_primary_handle(const struct rte_mp_msg *mp_msg,
+ const void *peer);
static const struct eth_dev_ops ena_dev_ops = {
- .dev_configure = ena_dev_configure,
- .dev_infos_get = ena_infos_get,
- .rx_queue_setup = ena_rx_queue_setup,
- .tx_queue_setup = ena_tx_queue_setup,
- .dev_start = ena_start,
- .dev_stop = ena_stop,
- .link_update = ena_link_update,
- .stats_get = ena_stats_get,
- .xstats_get_names = ena_xstats_get_names,
- .xstats_get = ena_xstats_get,
- .xstats_get_by_id = ena_xstats_get_by_id,
- .mtu_set = ena_mtu_set,
- .rx_queue_release = ena_rx_queue_release,
- .tx_queue_release = ena_tx_queue_release,
- .dev_close = ena_close,
- .dev_reset = ena_dev_reset,
- .reta_update = ena_rss_reta_update,
- .reta_query = ena_rss_reta_query,
- .rx_queue_intr_enable = ena_rx_queue_intr_enable,
- .rx_queue_intr_disable = ena_rx_queue_intr_disable,
- .rss_hash_update = ena_rss_hash_update,
- .rss_hash_conf_get = ena_rss_hash_conf_get,
+ .dev_configure = ena_dev_configure,
+ .dev_infos_get = ena_infos_get,
+ .rx_queue_setup = ena_rx_queue_setup,
+ .tx_queue_setup = ena_tx_queue_setup,
+ .dev_start = ena_start,
+ .dev_stop = ena_stop,
+ .link_update = ena_link_update,
+ .stats_get = ena_stats_get,
+ .xstats_get_names = ena_xstats_get_names,
+ .xstats_get_names_by_id = ena_xstats_get_names_by_id,
+ .xstats_get = ena_xstats_get,
+ .xstats_get_by_id = ena_xstats_get_by_id,
+ .mtu_set = ena_mtu_set,
+ .rx_queue_release = ena_rx_queue_release,
+ .tx_queue_release = ena_tx_queue_release,
+ .dev_close = ena_close,
+ .dev_reset = ena_dev_reset,
+ .reta_update = ena_rss_reta_update,
+ .reta_query = ena_rss_reta_query,
+ .rx_queue_intr_enable = ena_rx_queue_intr_enable,
+ .rx_queue_intr_disable = ena_rx_queue_intr_disable,
+ .rss_hash_update = ena_rss_hash_update,
+ .rss_hash_conf_get = ena_rss_hash_conf_get,
+ .tx_done_cleanup = ena_tx_cleanup,
+};
+
+/*********************************************************************
+ * Multi-Process communication bits
+ *********************************************************************/
+/* rte_mp IPC message name */
+#define ENA_MP_NAME "net_ena_mp"
+/* Request timeout in seconds */
+#define ENA_MP_REQ_TMO 5
+
+/** Proxy request type */
+enum ena_mp_req {
+ ENA_MP_DEV_STATS_GET,
+ ENA_MP_ENI_STATS_GET,
+ ENA_MP_MTU_SET,
+ ENA_MP_IND_TBL_GET,
+ ENA_MP_IND_TBL_SET
+};
+
+/** Proxy message body. Shared between requests and responses. */
+struct ena_mp_body {
+ /* Message type */
+ enum ena_mp_req type;
+ int port_id;
+ /* Processing result. Set in replies. 0 if message succeeded, negative
+ * error code otherwise.
+ */
+ int result;
+ union {
+ int mtu; /* For ENA_MP_MTU_SET */
+ } args;
};
-static inline void ena_rx_mbuf_prepare(struct rte_mbuf *mbuf,
+/**
+ * Initialize IPC message.
+ *
+ * @param[out] msg
+ * Pointer to the message to initialize.
+ * @param[in] type
+ * Message type.
+ * @param[in] port_id
+ * Port ID of target device.
+ *
+ */
+static void
+mp_msg_init(struct rte_mp_msg *msg, enum ena_mp_req type, int port_id)
+{
+ struct ena_mp_body *body = (struct ena_mp_body *)&msg->param;
+
+ memset(msg, 0, sizeof(*msg));
+ strlcpy(msg->name, ENA_MP_NAME, sizeof(msg->name));
+ msg->len_param = sizeof(*body);
+ body->type = type;
+ body->port_id = port_id;
+}
+
+/*********************************************************************
+ * Multi-Process communication PMD API
+ *********************************************************************/
+/**
+ * Define proxy request descriptor
+ *
+ * Used to define all structures and functions required for proxying a given
+ * function to the primary process including the code to perform to prepare the
+ * request and process the response.
+ *
+ * @param[in] f
+ * Name of the function to proxy
+ * @param[in] t
+ * Message type to use
+ * @param[in] prep
+ * Body of a function to prepare the request in form of a statement
+ * expression. It is passed all the original function arguments along with two
+ * extra ones:
+ * - struct ena_adapter *adapter - PMD data of the device calling the proxy.
+ * - struct ena_mp_body *req - body of a request to prepare.
+ * @param[in] proc
+ * Body of a function to process the response in form of a statement
+ * expression. It is passed all the original function arguments along with two
+ * extra ones:
+ * - struct ena_adapter *adapter - PMD data of the device calling the proxy.
+ * - struct ena_mp_body *rsp - body of a response to process.
+ * @param ...
+ * Proxied function's arguments
+ *
+ * @note Inside prep and proc any parameters which aren't used should be marked
+ * as such (with ENA_TOUCH or __rte_unused).
+ */
+#define ENA_PROXY_DESC(f, t, prep, proc, ...) \
+ static const enum ena_mp_req mp_type_ ## f = t; \
+ static const char *mp_name_ ## f = #t; \
+ static void mp_prep_ ## f(struct ena_adapter *adapter, \
+ struct ena_mp_body *req, \
+ __VA_ARGS__) \
+ { \
+ prep; \
+ } \
+ static void mp_proc_ ## f(struct ena_adapter *adapter, \
+ struct ena_mp_body *rsp, \
+ __VA_ARGS__) \
+ { \
+ proc; \
+ }
+
+/**
+ * Proxy wrapper for calling primary functions in a secondary process.
+ *
+ * Depending on whether called in primary or secondary process, calls the
+ * @p func directly or proxies the call to the primary process via rte_mp IPC.
+ * This macro requires a proxy request descriptor to be defined for @p func
+ * using ENA_PROXY_DESC() macro.
+ *
+ * @param[in/out] a
+ * Device PMD data. Used for sending the message and sharing message results
+ * between primary and secondary.
+ * @param[in] f
+ * Function to proxy.
+ * @param ...
+ * Arguments of @p func.
+ *
+ * @return
+ * - 0: Processing succeeded and response handler was called.
+ * - -EPERM: IPC is unavailable on this platform. This means only primary
+ * process may call the proxied function.
+ * - -EIO: IPC returned error on request send. Inspect rte_errno detailed
+ * error code.
+ * - Negative error code from the proxied function.
+ *
+ * @note This mechanism is geared towards control-path tasks. Avoid calling it
+ * in fast-path unless unbound delays are allowed. This is due to the IPC
+ * mechanism itself (socket based).
+ * @note Due to IPC parameter size limitations the proxy logic shares call
+ * results through the struct ena_adapter shared memory. This makes the
+ * proxy mechanism strictly single-threaded. Therefore be sure to make all
+ * calls to the same proxied function under the same lock.
+ */
+#define ENA_PROXY(a, f, ...) \
+({ \
+ struct ena_adapter *_a = (a); \
+ struct timespec ts = { .tv_sec = ENA_MP_REQ_TMO }; \
+ struct ena_mp_body *req, *rsp; \
+ struct rte_mp_reply mp_rep; \
+ struct rte_mp_msg mp_req; \
+ int ret; \
+ \
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY) { \
+ ret = f(__VA_ARGS__); \
+ } else { \
+ /* Prepare and send request */ \
+ req = (struct ena_mp_body *)&mp_req.param; \
+ mp_msg_init(&mp_req, mp_type_ ## f, _a->edev_data->port_id); \
+ mp_prep_ ## f(_a, req, ## __VA_ARGS__); \
+ \
+ ret = rte_mp_request_sync(&mp_req, &mp_rep, &ts); \
+ if (likely(!ret)) { \
+ RTE_ASSERT(mp_rep.nb_received == 1); \
+ rsp = (struct ena_mp_body *)&mp_rep.msgs[0].param; \
+ ret = rsp->result; \
+ if (ret == 0) { \
+ mp_proc_##f(_a, rsp, ## __VA_ARGS__); \
+ } else { \
+ PMD_DRV_LOG(ERR, \
+ "%s returned error: %d\n", \
+ mp_name_ ## f, rsp->result);\
+ } \
+ free(mp_rep.msgs); \
+ } else if (rte_errno == ENOTSUP) { \
+ PMD_DRV_LOG(ERR, \
+ "No IPC, can't proxy to primary\n");\
+ ret = -rte_errno; \
+ } else { \
+ PMD_DRV_LOG(ERR, "Request %s failed: %s\n", \
+ mp_name_ ## f, \
+ rte_strerror(rte_errno)); \
+ ret = -EIO; \
+ } \
+ } \
+ ret; \
+})
+
+/*********************************************************************
+ * Multi-Process communication request descriptors
+ *********************************************************************/
+
+ENA_PROXY_DESC(ena_com_get_dev_basic_stats, ENA_MP_DEV_STATS_GET,
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(req);
+ ENA_TOUCH(ena_dev);
+ ENA_TOUCH(stats);
+}),
+({
+ ENA_TOUCH(rsp);
+ ENA_TOUCH(ena_dev);
+ if (stats != &adapter->basic_stats)
+ rte_memcpy(stats, &adapter->basic_stats, sizeof(*stats));
+}),
+ struct ena_com_dev *ena_dev, struct ena_admin_basic_stats *stats);
+
+ENA_PROXY_DESC(ena_com_get_eni_stats, ENA_MP_ENI_STATS_GET,
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(req);
+ ENA_TOUCH(ena_dev);
+ ENA_TOUCH(stats);
+}),
+({
+ ENA_TOUCH(rsp);
+ ENA_TOUCH(ena_dev);
+ if (stats != (struct ena_admin_eni_stats *)&adapter->eni_stats)
+ rte_memcpy(stats, &adapter->eni_stats, sizeof(*stats));
+}),
+ struct ena_com_dev *ena_dev, struct ena_admin_eni_stats *stats);
+
+ENA_PROXY_DESC(ena_com_set_dev_mtu, ENA_MP_MTU_SET,
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(ena_dev);
+ req->args.mtu = mtu;
+}),
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(rsp);
+ ENA_TOUCH(ena_dev);
+ ENA_TOUCH(mtu);
+}),
+ struct ena_com_dev *ena_dev, int mtu);
+
+ENA_PROXY_DESC(ena_com_indirect_table_set, ENA_MP_IND_TBL_SET,
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(req);
+ ENA_TOUCH(ena_dev);
+}),
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(rsp);
+ ENA_TOUCH(ena_dev);
+}),
+ struct ena_com_dev *ena_dev);
+
+ENA_PROXY_DESC(ena_com_indirect_table_get, ENA_MP_IND_TBL_GET,
+({
+ ENA_TOUCH(adapter);
+ ENA_TOUCH(req);
+ ENA_TOUCH(ena_dev);
+ ENA_TOUCH(ind_tbl);
+}),
+({
+ ENA_TOUCH(rsp);
+ ENA_TOUCH(ena_dev);
+ if (ind_tbl != adapter->indirect_table)
+ rte_memcpy(ind_tbl, adapter->indirect_table,
+ sizeof(adapter->indirect_table));
+}),
+ struct ena_com_dev *ena_dev, u32 *ind_tbl);
+
+static inline void ena_trigger_reset(struct ena_adapter *adapter,
+ enum ena_regs_reset_reason_types reason)
+{
+ if (likely(!adapter->trigger_reset)) {
+ adapter->reset_reason = reason;
+ adapter->trigger_reset = true;
+ }
+}
+
+static inline void ena_rx_mbuf_prepare(struct ena_ring *rx_ring,
+ struct rte_mbuf *mbuf,
struct ena_com_rx_ctx *ena_rx_ctx,
bool fill_hash)
{
+ struct ena_stats_rx *rx_stats = &rx_ring->rx_stats;
uint64_t ol_flags = 0;
uint32_t packet_type = 0;
if (ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) {
packet_type |= RTE_PTYPE_L3_IPV4;
- if (unlikely(ena_rx_ctx->l3_csum_err))
+ if (unlikely(ena_rx_ctx->l3_csum_err)) {
+ ++rx_stats->l3_csum_bad;
ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
- else
+ } else {
ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+ }
} else if (ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV6) {
packet_type |= RTE_PTYPE_L3_IPV6;
}
- if (!ena_rx_ctx->l4_csum_checked || ena_rx_ctx->frag)
+ if (!ena_rx_ctx->l4_csum_checked || ena_rx_ctx->frag) {
ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
- else
- if (unlikely(ena_rx_ctx->l4_csum_err))
- ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
- else
+ } else {
+ if (unlikely(ena_rx_ctx->l4_csum_err)) {
+ ++rx_stats->l4_csum_bad;
+ /*
+ * For the L4 Rx checksum offload the HW may indicate
+ * bad checksum although it's valid. Because of that,
+ * we're setting the UNKNOWN flag to let the app
+ * re-verify the checksum.
+ */
+ ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN;
+ } else {
+ ++rx_stats->l4_csum_good;
ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
+ }
+ }
if (fill_hash &&
likely((packet_type & ENA_PTYPE_HAS_HASH) && !ena_rx_ctx->frag)) {
if (mbuf->ol_flags & RTE_MBUF_F_TX_IPV6) {
ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
+ /* For the IPv6 packets, DF always needs to be true. */
+ ena_tx_ctx->df = 1;
} else {
ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
if (mbuf->packet_type &
(RTE_PTYPE_L4_NONFRAG
| RTE_PTYPE_INNER_L4_NONFRAG))
- ena_tx_ctx->df = true;
+ ena_tx_ctx->df = 1;
}
/* check if L4 checksum is needed */
}
if (tx_info)
- PMD_TX_LOG(ERR, "tx_info doesn't have valid mbuf\n");
+ PMD_TX_LOG(ERR, "tx_info doesn't have valid mbuf. queue %d:%d req_id %u\n",
+ tx_ring->port_id, tx_ring->id, req_id);
else
- PMD_TX_LOG(ERR, "Invalid req_id: %hu\n", req_id);
+ PMD_TX_LOG(ERR, "Invalid req_id: %hu in queue %d:%d\n",
+ req_id, tx_ring->port_id, tx_ring->id);
/* Trigger device reset */
++tx_ring->tx_stats.bad_req_id;
- tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
- tx_ring->adapter->trigger_reset = true;
+ ena_trigger_reset(tx_ring->adapter, ENA_REGS_RESET_INV_TX_REQ_ID);
return -EFAULT;
}
int i;
int max_rings_stats;
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
- return -ENOTSUP;
-
memset(&ena_stats, 0, sizeof(ena_stats));
rte_spinlock_lock(&adapter->admin_lock);
- rc = ena_com_get_dev_basic_stats(ena_dev, &ena_stats);
+ rc = ENA_PROXY(adapter, ena_com_get_dev_basic_stats, ena_dev,
+ &ena_stats);
rte_spinlock_unlock(&adapter->admin_lock);
if (unlikely(rc)) {
PMD_DRV_LOG(ERR, "Could not retrieve statistics from ENA\n");
return -EINVAL;
}
- rc = ena_com_set_dev_mtu(ena_dev, mtu);
+ rc = ENA_PROXY(adapter, ena_com_set_dev_mtu, ena_dev, mtu);
if (rc)
PMD_DRV_LOG(ERR, "Could not set MTU: %d\n", mtu);
else
return i;
}
-static int ena_device_init(struct ena_com_dev *ena_dev,
+static int ena_device_init(struct ena_adapter *adapter,
struct rte_pci_device *pdev,
- struct ena_com_dev_get_features_ctx *get_feat_ctx,
- bool *wd_state)
+ struct ena_com_dev_get_features_ctx *get_feat_ctx)
{
+ struct ena_com_dev *ena_dev = &adapter->ena_dev;
uint32_t aenq_groups;
int rc;
bool readless_supported;
BIT(ENA_ADMIN_WARNING);
aenq_groups &= get_feat_ctx->aenq.supported_groups;
- rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
- if (rc) {
- PMD_DRV_LOG(ERR, "Cannot configure AENQ groups, rc: %d\n", rc);
- goto err_admin_init;
- }
- *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
+ adapter->all_aenq_groups = aenq_groups;
return 0;
static void check_for_missing_keep_alive(struct ena_adapter *adapter)
{
- if (!adapter->wd_state)
+ if (!(adapter->active_aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)))
return;
if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
if (unlikely((rte_get_timer_cycles() - adapter->timestamp_wd) >=
adapter->keep_alive_timeout)) {
PMD_DRV_LOG(ERR, "Keep alive timeout\n");
- adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
- adapter->trigger_reset = true;
+ ena_trigger_reset(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO);
++adapter->dev_stats.wd_expired;
}
}
{
if (unlikely(!ena_com_get_admin_running_state(&adapter->ena_dev))) {
PMD_DRV_LOG(ERR, "ENA admin queue is not in running state\n");
- adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
- adapter->trigger_reset = true;
+ ena_trigger_reset(adapter, ENA_REGS_RESET_ADMIN_TO);
}
}
struct rte_eth_dev *dev = arg;
struct ena_adapter *adapter = dev->data->dev_private;
+ if (unlikely(adapter->trigger_reset))
+ return;
+
check_for_missing_keep_alive(adapter);
check_for_admin_com_state(adapter);
check_for_tx_completions(adapter);
return 0;
}
+ if (adapter->dev_mem_base == NULL) {
+ PMD_DRV_LOG(ERR,
+ "LLQ is advertised as supported, but device doesn't expose mem bar\n");
+ ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
+ return 0;
+ }
+
rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
if (unlikely(rc)) {
PMD_INIT_LOG(WARNING,
if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
return 0;
- if (!adapter->dev_mem_base) {
- PMD_DRV_LOG(ERR,
- "Unable to access LLQ BAR resource. Fallback to host mode policy.\n");
- ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
- return 0;
- }
-
ena_dev->mem_bar = adapter->dev_mem_base;
return 0;
offloads->rx_offloads |= ENA_RX_RSS_HASH;
}
+static int ena_init_once(void)
+{
+ static bool init_done;
+
+ if (init_done)
+ return 0;
+
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+ /* Init timer subsystem for the ENA timer service. */
+ rte_timer_subsystem_init();
+ /* Register handler for requests from secondary processes. */
+ rte_mp_action_register(ENA_MP_NAME, ena_mp_primary_handle);
+ }
+
+ init_done = true;
+ return 0;
+}
+
static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)
{
struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
int rc;
static int adapters_found;
bool disable_meta_caching;
- bool wd_state = false;
eth_dev->dev_ops = &ena_dev_ops;
eth_dev->rx_pkt_burst = ð_ena_recv_pkts;
eth_dev->tx_pkt_burst = ð_ena_xmit_pkts;
eth_dev->tx_pkt_prepare = ð_ena_prep_pkts;
+ rc = ena_init_once();
+ if (rc != 0)
+ return rc;
+
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
}
ena_dev->reg_bar = adapter->regs;
- /* This is a dummy pointer for ena_com functions. */
- ena_dev->dmadev = adapter;
+ /* Pass device data as a pointer which can be passed to the IO functions
+ * by the ena_com (for example - the memory allocation).
+ */
+ ena_dev->dmadev = eth_dev->data;
adapter->id_number = adapters_found;
snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d",
adapter->id_number);
+ adapter->missing_tx_completion_to = ENA_TX_TIMEOUT;
+
rc = ena_parse_devargs(adapter, pci_dev->device.devargs);
if (rc != 0) {
PMD_INIT_LOG(CRIT, "Failed to parse devargs\n");
}
/* device specific initialization routine */
- rc = ena_device_init(ena_dev, pci_dev, &get_feat_ctx, &wd_state);
+ rc = ena_device_init(adapter, pci_dev, &get_feat_ctx);
if (rc) {
PMD_INIT_LOG(CRIT, "Failed to init ENA device\n");
goto err;
}
- adapter->wd_state = wd_state;
+
+ /* Check if device supports LSC */
+ if (!(adapter->all_aenq_groups & BIT(ENA_ADMIN_LINK_CHANGE)))
+ adapter->edev_data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC;
set_default_llq_configurations(&llq_config, &get_feat_ctx.llq,
adapter->use_large_llq_hdr);
ena_com_set_admin_polling_mode(ena_dev, false);
ena_com_admin_aenq_enable(ena_dev);
- if (adapters_found == 0)
- rte_timer_subsystem_init();
rte_timer_init(&adapter->timer_wd);
adapters_found++;
static int ena_dev_configure(struct rte_eth_dev *dev)
{
struct ena_adapter *adapter = dev->data->dev_private;
+ int rc;
adapter->state = ENA_ADAPTER_STATE_CONFIG;
adapter->missing_tx_completion_budget =
RTE_MIN(ENA_MONITORED_TX_QUEUES, dev->data->nb_tx_queues);
- adapter->missing_tx_completion_to = ENA_TX_TIMEOUT;
/* To avoid detection of the spurious Tx completion timeout due to
* application not calling the Tx cleanup function, set timeout for the
* Tx queue which should be half of the missing completion timeout for a
*/
adapter->tx_cleanup_stall_delay = adapter->missing_tx_completion_to / 2;
- adapter->tx_selected_offloads = dev->data->dev_conf.txmode.offloads;
- adapter->rx_selected_offloads = dev->data->dev_conf.rxmode.offloads;
+ rc = ena_configure_aenq(adapter);
- return 0;
+ return rc;
}
static void ena_init_rings(struct ena_adapter *adapter,
rc);
if (rc == ENA_COM_NO_SPACE) {
++rx_ring->rx_stats.bad_desc_num;
- rx_ring->adapter->reset_reason =
- ENA_REGS_RESET_TOO_MANY_RX_DESCS;
+ ena_trigger_reset(rx_ring->adapter,
+ ENA_REGS_RESET_TOO_MANY_RX_DESCS);
} else {
++rx_ring->rx_stats.bad_req_id;
- rx_ring->adapter->reset_reason =
- ENA_REGS_RESET_INV_RX_REQ_ID;
+ ena_trigger_reset(rx_ring->adapter,
+ ENA_REGS_RESET_INV_RX_REQ_ID);
}
- rx_ring->adapter->trigger_reset = true;
return 0;
}
}
/* fill mbuf attributes if any */
- ena_rx_mbuf_prepare(mbuf, &ena_rx_ctx, fill_hash);
+ ena_rx_mbuf_prepare(rx_ring, mbuf, &ena_rx_ctx, fill_hash);
if (unlikely(mbuf->ol_flags &
- (RTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD))) {
+ (RTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD)))
rte_atomic64_inc(&rx_ring->adapter->drv_stats->ierrors);
- ++rx_ring->rx_stats.bad_csum;
- }
rx_pkts[completed] = mbuf;
rx_ring->rx_stats.bytes += mbuf->pkt_len;
adapter->ena_dev.mmio_read.reg_read_to =
hints->mmio_read_timeout * 1000;
- if (hints->missing_tx_completion_timeout) {
- if (hints->missing_tx_completion_timeout ==
- ENA_HW_HINTS_NO_TIMEOUT) {
- adapter->missing_tx_completion_to =
- ENA_HW_HINTS_NO_TIMEOUT;
- } else {
- /* Convert from msecs to ticks */
- adapter->missing_tx_completion_to = rte_get_timer_hz() *
- hints->missing_tx_completion_timeout / 1000;
- adapter->tx_cleanup_stall_delay =
- adapter->missing_tx_completion_to / 2;
- }
- }
-
if (hints->driver_watchdog_timeout) {
if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
if (unlikely(rc)) {
PMD_DRV_LOG(ERR, "Failed to prepare Tx buffers, rc: %d\n", rc);
++tx_ring->tx_stats.prepare_ctx_err;
- tx_ring->adapter->reset_reason =
- ENA_REGS_RESET_DRIVER_INVALID_STATE;
- tx_ring->adapter->trigger_reset = true;
+ ena_trigger_reset(tx_ring->adapter,
+ ENA_REGS_RESET_DRIVER_INVALID_STATE);
return rc;
}
return 0;
}
-static void ena_tx_cleanup(struct ena_ring *tx_ring)
+static int ena_tx_cleanup(void *txp, uint32_t free_pkt_cnt)
{
+ struct ena_ring *tx_ring = (struct ena_ring *)txp;
unsigned int total_tx_descs = 0;
+ unsigned int total_tx_pkts = 0;
uint16_t cleanup_budget;
uint16_t next_to_clean = tx_ring->next_to_clean;
- /* Attempt to release all Tx descriptors (ring_size - 1 -> size_mask) */
- cleanup_budget = tx_ring->size_mask;
+ /*
+ * If free_pkt_cnt is equal to 0, it means that the user requested
+ * full cleanup, so attempt to release all Tx descriptors
+ * (ring_size - 1 -> size_mask)
+ */
+ cleanup_budget = (free_pkt_cnt == 0) ? tx_ring->size_mask : free_pkt_cnt;
- while (likely(total_tx_descs < cleanup_budget)) {
+ while (likely(total_tx_pkts < cleanup_budget)) {
struct rte_mbuf *mbuf;
struct ena_tx_buffer *tx_info;
uint16_t req_id;
tx_ring->empty_tx_reqs[next_to_clean] = req_id;
total_tx_descs += tx_info->tx_descs;
+ total_tx_pkts++;
/* Put back descriptor to the ring for reuse */
next_to_clean = ENA_IDX_NEXT_MASKED(next_to_clean,
ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
}
- /* Notify completion handler that the cleanup was just called */
- tx_ring->last_cleanup_ticks = rte_get_timer_cycles();
+ /* Notify completion handler that full cleanup was performed */
+ if (free_pkt_cnt == 0 || total_tx_pkts < cleanup_budget)
+ tx_ring->last_cleanup_ticks = rte_get_timer_cycles();
+
+ return total_tx_pkts;
}
static uint16_t eth_ena_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
}
#endif
+ available_desc = ena_com_free_q_entries(tx_ring->ena_com_io_sq);
+ if (available_desc < tx_ring->tx_free_thresh)
+ ena_tx_cleanup((void *)tx_ring, 0);
+
for (sent_idx = 0; sent_idx < nb_pkts; sent_idx++) {
if (ena_xmit_mbuf(tx_ring, tx_pkts[sent_idx]))
break;
tx_ring->size_mask)]);
}
- available_desc = ena_com_free_q_entries(tx_ring->ena_com_io_sq);
- tx_ring->tx_stats.available_desc = available_desc;
-
/* If there are ready packets to be xmitted... */
if (likely(tx_ring->pkts_without_db)) {
/* ...let HW do its best :-) */
tx_ring->pkts_without_db = false;
}
- if (available_desc < tx_ring->tx_free_thresh)
- ena_tx_cleanup(tx_ring);
-
tx_ring->tx_stats.available_desc =
ena_com_free_q_entries(tx_ring->ena_com_io_sq);
tx_ring->tx_stats.tx_poll++;
return sent_idx;
}
-int ena_copy_eni_stats(struct ena_adapter *adapter)
+int ena_copy_eni_stats(struct ena_adapter *adapter, struct ena_stats_eni *stats)
{
- struct ena_admin_eni_stats admin_eni_stats;
int rc;
rte_spinlock_lock(&adapter->admin_lock);
- rc = ena_com_get_eni_stats(&adapter->ena_dev, &admin_eni_stats);
+ /* Retrieve and store the latest statistics from the AQ. This ensures
+ * that previous value is returned in case of a com error.
+ */
+ rc = ENA_PROXY(adapter, ena_com_get_eni_stats, &adapter->ena_dev,
+ (struct ena_admin_eni_stats *)stats);
rte_spinlock_unlock(&adapter->admin_lock);
if (rc != 0) {
if (rc == ENA_COM_UNSUPPORTED) {
return rc;
}
- rte_memcpy(&adapter->eni_stats, &admin_eni_stats,
- sizeof(struct ena_stats_eni));
-
return 0;
}
return xstats_count;
}
+/**
+ * DPDK callback to retrieve names of extended device statistics for the given
+ * ids.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param[out] xstats_names
+ * Buffer to insert names into.
+ * @param ids
+ * IDs array for which the names should be retrieved.
+ * @param size
+ * Number of ids.
+ *
+ * @return
+ * Positive value: number of xstats names. Negative value: error code.
+ */
+static int ena_xstats_get_names_by_id(struct rte_eth_dev *dev,
+ const uint64_t *ids,
+ struct rte_eth_xstat_name *xstats_names,
+ unsigned int size)
+{
+ uint64_t xstats_count = ena_xstats_calc_num(dev->data);
+ uint64_t id, qid;
+ unsigned int i;
+
+ if (xstats_names == NULL)
+ return xstats_count;
+
+ for (i = 0; i < size; ++i) {
+ id = ids[i];
+ if (id > xstats_count) {
+ PMD_DRV_LOG(ERR,
+ "ID value out of range: id=%" PRIu64 ", xstats_num=%" PRIu64 "\n",
+ id, xstats_count);
+ return -EINVAL;
+ }
+
+ if (id < ENA_STATS_ARRAY_GLOBAL) {
+ strcpy(xstats_names[i].name,
+ ena_stats_global_strings[id].name);
+ continue;
+ }
+
+ id -= ENA_STATS_ARRAY_GLOBAL;
+ if (id < ENA_STATS_ARRAY_ENI) {
+ strcpy(xstats_names[i].name,
+ ena_stats_eni_strings[id].name);
+ continue;
+ }
+
+ id -= ENA_STATS_ARRAY_ENI;
+ if (id < ENA_STATS_ARRAY_RX) {
+ qid = id / dev->data->nb_rx_queues;
+ id %= dev->data->nb_rx_queues;
+ snprintf(xstats_names[i].name,
+ sizeof(xstats_names[i].name),
+ "rx_q%" PRIu64 "d_%s",
+ qid, ena_stats_rx_strings[id].name);
+ continue;
+ }
+
+ id -= ENA_STATS_ARRAY_RX;
+ /* Although this condition is not needed, it was added for
+ * compatibility if new xstat structure would be ever added.
+ */
+ if (id < ENA_STATS_ARRAY_TX) {
+ qid = id / dev->data->nb_tx_queues;
+ id %= dev->data->nb_tx_queues;
+ snprintf(xstats_names[i].name,
+ sizeof(xstats_names[i].name),
+ "tx_q%" PRIu64 "_%s",
+ qid, ena_stats_tx_strings[id].name);
+ continue;
+ }
+ }
+
+ return i;
+}
+
/**
* DPDK callback to get extended device statistics.
*
{
struct ena_adapter *adapter = dev->data->dev_private;
unsigned int xstats_count = ena_xstats_calc_num(dev->data);
+ struct ena_stats_eni eni_stats;
unsigned int stat, i, count = 0;
int stat_offset;
void *stats_begin;
/* Even if the function below fails, we should copy previous (or initial
* values) to keep structure of rte_eth_xstat consistent.
*/
- ena_copy_eni_stats(adapter);
+ ena_copy_eni_stats(adapter, &eni_stats);
for (stat = 0; stat < ENA_STATS_ARRAY_ENI; stat++, count++) {
stat_offset = ena_stats_eni_strings[stat].stat_offset;
- stats_begin = &adapter->eni_stats;
+ stats_begin = &eni_stats;
xstats[count].id = count;
xstats[count].value = *((uint64_t *)
unsigned int n)
{
struct ena_adapter *adapter = dev->data->dev_private;
+ struct ena_stats_eni eni_stats;
uint64_t id;
uint64_t rx_entries, tx_entries;
unsigned int i;
*/
if (!was_eni_copied) {
was_eni_copied = true;
- ena_copy_eni_stats(adapter);
+ ena_copy_eni_stats(adapter, &eni_stats);
}
- values[i] = *((uint64_t *)&adapter->eni_stats + id);
+ values[i] = *((uint64_t *)&eni_stats + id);
++valid;
continue;
}
return valid;
}
+static int ena_process_uint_devarg(const char *key,
+ const char *value,
+ void *opaque)
+{
+ struct ena_adapter *adapter = opaque;
+ char *str_end;
+ uint64_t uint_value;
+
+ uint_value = strtoull(value, &str_end, 10);
+ if (value == str_end) {
+ PMD_INIT_LOG(ERR,
+ "Invalid value for key '%s'. Only uint values are accepted.\n",
+ key);
+ return -EINVAL;
+ }
+
+ if (strcmp(key, ENA_DEVARG_MISS_TXC_TO) == 0) {
+ if (uint_value > ENA_MAX_TX_TIMEOUT_SECONDS) {
+ PMD_INIT_LOG(ERR,
+ "Tx timeout too high: %" PRIu64 " sec. Maximum allowed: %d sec.\n",
+ uint_value, ENA_MAX_TX_TIMEOUT_SECONDS);
+ return -EINVAL;
+ } else if (uint_value == 0) {
+ PMD_INIT_LOG(INFO,
+ "Check for missing Tx completions has been disabled.\n");
+ adapter->missing_tx_completion_to =
+ ENA_HW_HINTS_NO_TIMEOUT;
+ } else {
+ PMD_INIT_LOG(INFO,
+ "Tx packet completion timeout set to %" PRIu64 " seconds.\n",
+ uint_value);
+ adapter->missing_tx_completion_to =
+ uint_value * rte_get_timer_hz();
+ }
+ }
+
+ return 0;
+}
+
static int ena_process_bool_devarg(const char *key,
const char *value,
void *opaque)
{
static const char * const allowed_args[] = {
ENA_DEVARG_LARGE_LLQ_HDR,
+ ENA_DEVARG_MISS_TXC_TO,
NULL,
};
struct rte_kvargs *kvlist;
rc = rte_kvargs_process(kvlist, ENA_DEVARG_LARGE_LLQ_HDR,
ena_process_bool_devarg, adapter);
+ if (rc != 0)
+ goto exit;
+ rc = rte_kvargs_process(kvlist, ENA_DEVARG_MISS_TXC_TO,
+ ena_process_uint_devarg, adapter);
+exit:
rte_kvargs_free(kvlist);
return rc;
return 0;
}
+static int ena_configure_aenq(struct ena_adapter *adapter)
+{
+ uint32_t aenq_groups = adapter->all_aenq_groups;
+ int rc;
+
+ /* All_aenq_groups holds all AENQ functions supported by the device and
+ * the HW, so at first we need to be sure the LSC request is valid.
+ */
+ if (adapter->edev_data->dev_conf.intr_conf.lsc != 0) {
+ if (!(aenq_groups & BIT(ENA_ADMIN_LINK_CHANGE))) {
+ PMD_DRV_LOG(ERR,
+ "LSC requested, but it's not supported by the AENQ\n");
+ return -EINVAL;
+ }
+ } else {
+ /* If LSC wasn't enabled by the app, let's enable all supported
+ * AENQ procedures except the LSC.
+ */
+ aenq_groups &= ~BIT(ENA_ADMIN_LINK_CHANGE);
+ }
+
+ rc = ena_com_set_aenq_config(&adapter->ena_dev, aenq_groups);
+ if (rc != 0) {
+ PMD_DRV_LOG(ERR, "Cannot configure AENQ groups, rc=%d\n", rc);
+ return rc;
+ }
+
+ adapter->active_aenq_groups = aenq_groups;
+
+ return 0;
+}
+
+int ena_mp_indirect_table_set(struct ena_adapter *adapter)
+{
+ return ENA_PROXY(adapter, ena_com_indirect_table_set, &adapter->ena_dev);
+}
+
+int ena_mp_indirect_table_get(struct ena_adapter *adapter,
+ uint32_t *indirect_table)
+{
+ return ENA_PROXY(adapter, ena_com_indirect_table_get, &adapter->ena_dev,
+ indirect_table);
+}
+
+/*********************************************************************
+ * ena_plat_dpdk.h functions implementations
+ *********************************************************************/
+
+const struct rte_memzone *
+ena_mem_alloc_coherent(struct rte_eth_dev_data *data, size_t size,
+ int socket_id, unsigned int alignment, void **virt_addr,
+ dma_addr_t *phys_addr)
+{
+ char z_name[RTE_MEMZONE_NAMESIZE];
+ struct ena_adapter *adapter = data->dev_private;
+ const struct rte_memzone *memzone;
+ int rc;
+
+ rc = snprintf(z_name, RTE_MEMZONE_NAMESIZE, "ena_p%d_mz%" PRIu64 "",
+ data->port_id, adapter->memzone_cnt);
+ if (rc >= RTE_MEMZONE_NAMESIZE) {
+ PMD_DRV_LOG(ERR,
+ "Name for the ena_com memzone is too long. Port: %d, mz_num: %" PRIu64 "\n",
+ data->port_id, adapter->memzone_cnt);
+ goto error;
+ }
+ adapter->memzone_cnt++;
+
+ memzone = rte_memzone_reserve_aligned(z_name, size, socket_id,
+ RTE_MEMZONE_IOVA_CONTIG, alignment);
+ if (memzone == NULL) {
+ PMD_DRV_LOG(ERR, "Failed to allocate ena_com memzone: %s\n",
+ z_name);
+ goto error;
+ }
+
+ memset(memzone->addr, 0, size);
+ *virt_addr = memzone->addr;
+ *phys_addr = memzone->iova;
+
+ return memzone;
+
+error:
+ *virt_addr = NULL;
+ *phys_addr = 0;
+
+ return NULL;
+}
+
+
/*********************************************************************
* PMD configuration
*********************************************************************/
},
.unimplemented_handler = unimplemented_aenq_handler
};
+
+/*********************************************************************
+ * Multi-Process communication request handling (in primary)
+ *********************************************************************/
+static int
+ena_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer)
+{
+ const struct ena_mp_body *req =
+ (const struct ena_mp_body *)mp_msg->param;
+ struct ena_adapter *adapter;
+ struct ena_com_dev *ena_dev;
+ struct ena_mp_body *rsp;
+ struct rte_mp_msg mp_rsp;
+ struct rte_eth_dev *dev;
+ int res = 0;
+
+ rsp = (struct ena_mp_body *)&mp_rsp.param;
+ mp_msg_init(&mp_rsp, req->type, req->port_id);
+
+ if (!rte_eth_dev_is_valid_port(req->port_id)) {
+ rte_errno = ENODEV;
+ res = -rte_errno;
+ PMD_DRV_LOG(ERR, "Unknown port %d in request %d\n",
+ req->port_id, req->type);
+ goto end;
+ }
+ dev = &rte_eth_devices[req->port_id];
+ adapter = dev->data->dev_private;
+ ena_dev = &adapter->ena_dev;
+
+ switch (req->type) {
+ case ENA_MP_DEV_STATS_GET:
+ res = ena_com_get_dev_basic_stats(ena_dev,
+ &adapter->basic_stats);
+ break;
+ case ENA_MP_ENI_STATS_GET:
+ res = ena_com_get_eni_stats(ena_dev,
+ (struct ena_admin_eni_stats *)&adapter->eni_stats);
+ break;
+ case ENA_MP_MTU_SET:
+ res = ena_com_set_dev_mtu(ena_dev, req->args.mtu);
+ break;
+ case ENA_MP_IND_TBL_GET:
+ res = ena_com_indirect_table_get(ena_dev,
+ adapter->indirect_table);
+ break;
+ case ENA_MP_IND_TBL_SET:
+ res = ena_com_indirect_table_set(ena_dev);
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "Unknown request type %d\n", req->type);
+ res = -EINVAL;
+ break;
+ }
+
+end:
+ /* Save processing result in the reply */
+ rsp->result = res;
+ /* Return just IPC processing status */
+ return rte_mp_reply(&mp_rsp, peer);
+}
git.droids-corp.org / dpdk.git / blobdiff