#include <ena_eth_io_defs.h>
#define DRV_MODULE_VER_MAJOR 2
-#define DRV_MODULE_VER_MINOR 2
-#define DRV_MODULE_VER_SUBMINOR 1
+#define DRV_MODULE_VER_MINOR 3
+#define DRV_MODULE_VER_SUBMINOR 0
#define ENA_IO_TXQ_IDX(q) (2 * (q))
#define ENA_IO_RXQ_IDX(q) (2 * (q) + 1)
#define ENA_MIN_RING_DESC 128
+#define ENA_PTYPE_HAS_HASH (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP)
+
enum ethtool_stringset {
ETH_SS_TEST = 0,
ETH_SS_STATS,
* Each rte_memzone should have unique name.
* To satisfy it, count number of allocation and add it to name.
*/
-rte_atomic32_t ena_alloc_cnt;
+rte_atomic64_t ena_alloc_cnt;
static const struct ena_stats ena_stats_global_strings[] = {
ENA_STAT_GLOBAL_ENTRY(wd_expired),
static struct ena_aenq_handlers aenq_handlers;
static int ena_device_init(struct ena_com_dev *ena_dev,
+ struct rte_pci_device *pdev,
struct ena_com_dev_get_features_ctx *get_feat_ctx,
bool *wd_state);
static int ena_dev_configure(struct rte_eth_dev *dev);
else
ol_flags |= PKT_RX_L4_CKSUM_GOOD;
+ if (likely((packet_type & ENA_PTYPE_HAS_HASH) && !ena_rx_ctx->frag)) {
+ ol_flags |= PKT_RX_RSS_HASH;
+ mbuf->hash.rss = ena_rx_ctx->hash;
+ }
+
mbuf->ol_flags = ol_flags;
mbuf->packet_type = packet_type;
}
}
/* This function calculates the number of xstats based on the current config */
-static unsigned int ena_xstats_calc_num(struct rte_eth_dev *dev)
+static unsigned int ena_xstats_calc_num(struct rte_eth_dev_data *data)
{
return ENA_STATS_ARRAY_GLOBAL + ENA_STATS_ARRAY_ENI +
- (dev->data->nb_tx_queues * ENA_STATS_ARRAY_TX) +
- (dev->data->nb_rx_queues * ENA_STATS_ARRAY_RX);
+ (data->nb_tx_queues * ENA_STATS_ARRAY_TX) +
+ (data->nb_rx_queues * ENA_STATS_ARRAY_RX);
}
static void ena_config_debug_area(struct ena_adapter *adapter)
u32 debug_area_size;
int rc, ss_count;
- ss_count = ena_xstats_calc_num(adapter->rte_dev);
+ ss_count = ena_xstats_calc_num(adapter->edev_data);
/* allocate 32 bytes for each string and 64bit for the value */
debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
rte_intr_disable(intr_handle);
rte_intr_callback_unregister(intr_handle,
ena_interrupt_handler_rte,
- adapter);
+ dev);
/*
* MAC is not allocated dynamically. Setting NULL should prevent from
{
int rc = 0;
+ /* Cannot release memory in secondary process */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ PMD_DRV_LOG(WARNING, "dev_reset not supported in secondary.\n");
+ return -EPERM;
+ }
+
ena_destroy_device(dev);
rc = eth_ena_dev_init(dev);
if (rc)
}
PMD_DRV_LOG(DEBUG, "%s(): RSS configured %d entries for port %d\n",
- __func__, reta_size, adapter->rte_dev->data->port_id);
+ __func__, reta_size, dev->data->port_id);
return 0;
}
static int ena_rss_init_default(struct ena_adapter *adapter)
{
struct ena_com_dev *ena_dev = &adapter->ena_dev;
- uint16_t nb_rx_queues = adapter->rte_dev->data->nb_rx_queues;
+ uint16_t nb_rx_queues = adapter->edev_data->nb_rx_queues;
int rc, i;
u32 val;
goto err_fill_indir;
}
PMD_DRV_LOG(DEBUG, "RSS configured for port %d\n",
- adapter->rte_dev->data->port_id);
+ adapter->edev_data->port_id);
return 0;
{
uint32_t max_frame_len = adapter->max_mtu;
- if (adapter->rte_eth_dev_data->dev_conf.rxmode.offloads &
+ if (adapter->edev_data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_JUMBO_FRAME)
max_frame_len =
- adapter->rte_eth_dev_data->dev_conf.rxmode.max_rx_pkt_len;
+ adapter->edev_data->dev_conf.rxmode.max_rx_pkt_len;
return max_frame_len;
}
uint64_t ticks;
int rc = 0;
+ /* Cannot allocate memory in secondary process */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ PMD_DRV_LOG(WARNING, "dev_start not supported in secondary.\n");
+ return -EPERM;
+ }
+
rc = ena_check_valid_conf(adapter);
if (rc)
return rc;
if (rc)
goto err_start_tx;
- if (adapter->rte_dev->data->dev_conf.rxmode.mq_mode &
- ETH_MQ_RX_RSS_FLAG && adapter->rte_dev->data->nb_rx_queues > 0) {
+ if (adapter->edev_data->dev_conf.rxmode.mq_mode &
+ ETH_MQ_RX_RSS_FLAG && adapter->edev_data->nb_rx_queues > 0) {
rc = ena_rss_init_default(adapter);
if (rc)
goto err_rss_init;
ticks = rte_get_timer_hz();
rte_timer_reset(&adapter->timer_wd, ticks, PERIODICAL, rte_lcore_id(),
- ena_timer_wd_callback, adapter);
+ ena_timer_wd_callback, dev);
++adapter->dev_stats.dev_start;
adapter->state = ENA_ADAPTER_STATE_RUNNING;
struct ena_com_dev *ena_dev = &adapter->ena_dev;
int rc;
+ /* Cannot free memory in secondary process */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+ PMD_DRV_LOG(WARNING, "dev_stop not supported in secondary.\n");
+ return -EPERM;
+ }
+
rte_timer_stop_sync(&adapter->timer_wd);
ena_queue_stop_all(dev, ENA_RING_TYPE_TX);
ena_queue_stop_all(dev, ENA_RING_TYPE_RX);
return -EINVAL;
}
- if (nb_desc == RTE_ETH_DEV_FALLBACK_TX_RINGSIZE)
- nb_desc = adapter->max_tx_ring_size;
-
txq->port_id = dev->data->port_id;
txq->next_to_clean = 0;
txq->next_to_use = 0;
return ENA_COM_FAULT;
}
- if (nb_desc == RTE_ETH_DEV_FALLBACK_RX_RINGSIZE)
- nb_desc = adapter->max_rx_ring_size;
-
if (!rte_is_power_of_2(nb_desc)) {
PMD_DRV_LOG(ERR,
"Unsupported size of RX queue: %d is not a power of 2.\n",
}
static int ena_device_init(struct ena_com_dev *ena_dev,
+ struct rte_pci_device *pdev,
struct ena_com_dev_get_features_ctx *get_feat_ctx,
bool *wd_state)
{
/* The PCIe configuration space revision id indicate if mmio reg
* read is disabled.
*/
- readless_supported =
- !(((struct rte_pci_device *)ena_dev->dmadev)->id.class_id
- & ENA_MMIO_DISABLE_REG_READ);
+ readless_supported = !(pdev->id.class_id & ENA_MMIO_DISABLE_REG_READ);
ena_com_set_mmio_read_mode(ena_dev, readless_supported);
/* reset device */
static void ena_interrupt_handler_rte(void *cb_arg)
{
- struct ena_adapter *adapter = cb_arg;
+ struct rte_eth_dev *dev = cb_arg;
+ struct ena_adapter *adapter = dev->data->dev_private;
struct ena_com_dev *ena_dev = &adapter->ena_dev;
ena_com_admin_q_comp_intr_handler(ena_dev);
if (likely(adapter->state != ENA_ADAPTER_STATE_CLOSED))
- ena_com_aenq_intr_handler(ena_dev, adapter);
+ ena_com_aenq_intr_handler(ena_dev, dev);
}
static void check_for_missing_keep_alive(struct ena_adapter *adapter)
static void ena_timer_wd_callback(__rte_unused struct rte_timer *timer,
void *arg)
{
- struct ena_adapter *adapter = arg;
- struct rte_eth_dev *dev = adapter->rte_dev;
+ struct rte_eth_dev *dev = arg;
+ struct ena_adapter *adapter = dev->data->dev_private;
check_for_missing_keep_alive(adapter);
check_for_admin_com_state(adapter);
memset(adapter, 0, sizeof(struct ena_adapter));
ena_dev = &adapter->ena_dev;
- adapter->rte_eth_dev_data = eth_dev->data;
- adapter->rte_dev = eth_dev;
+ adapter->edev_data = eth_dev->data;
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
- adapter->pdev = pci_dev;
PMD_INIT_LOG(INFO, "Initializing %x:%x:%x.%d",
pci_dev->addr.domain,
}
ena_dev->reg_bar = adapter->regs;
- ena_dev->dmadev = adapter->pdev;
+ /* This is a dummy pointer for ena_com functions. */
+ ena_dev->dmadev = adapter;
adapter->id_number = adapters_found;
}
/* device specific initialization routine */
- rc = ena_device_init(ena_dev, &get_feat_ctx, &wd_state);
+ rc = ena_device_init(ena_dev, pci_dev, &get_feat_ctx, &wd_state);
if (rc) {
PMD_INIT_LOG(CRIT, "Failed to init ENA device");
goto err;
rte_intr_callback_register(intr_handle,
ena_interrupt_handler_rte,
- adapter);
+ eth_dev);
rte_intr_enable(intr_handle);
ena_com_set_admin_polling_mode(ena_dev, false);
ena_com_admin_aenq_enable(ena_dev);
adapter->state = ENA_ADAPTER_STATE_CONFIG;
+ if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+ dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
adapter->tx_selected_offloads = dev->data->dev_conf.txmode.offloads;
adapter->rx_selected_offloads = dev->data->dev_conf.rxmode.offloads;
return 0;
/* Inform framework about available features */
dev_info->rx_offload_capa = rx_feat;
+ dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_RSS_HASH;
dev_info->rx_queue_offload_capa = rx_feat;
dev_info->tx_offload_capa = tx_feat;
dev_info->tx_queue_offload_capa = tx_feat;
dev_info->tx_desc_lim.nb_mtu_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS,
adapter->max_tx_sgl_size);
+ dev_info->default_rxportconf.ring_size = ENA_DEFAULT_RING_SIZE;
+ dev_info->default_txportconf.ring_size = ENA_DEFAULT_RING_SIZE;
+
return 0;
}
++rx_ring->rx_stats.bad_csum;
}
- mbuf->hash.rss = ena_rx_ctx.hash;
-
rx_pkts[completed] = mbuf;
rx_ring->rx_stats.bytes += mbuf->pkt_len;
}
struct rte_eth_xstat_name *xstats_names,
unsigned int n)
{
- unsigned int xstats_count = ena_xstats_calc_num(dev);
+ unsigned int xstats_count = ena_xstats_calc_num(dev->data);
unsigned int stat, i, count = 0;
if (n < xstats_count || !xstats_names)
unsigned int n)
{
struct ena_adapter *adapter = dev->data->dev_private;
- unsigned int xstats_count = ena_xstats_calc_num(dev);
+ unsigned int xstats_count = ena_xstats_calc_num(dev->data);
unsigned int stat, i, count = 0;
int stat_offset;
void *stats_begin;
}
/* Now, assign it to the proper adapter field. */
- if (strcmp(key, ENA_DEVARG_LARGE_LLQ_HDR))
+ if (strcmp(key, ENA_DEVARG_LARGE_LLQ_HDR) == 0)
adapter->use_large_llq_hdr = bool_value;
return 0;
{
static const char * const allowed_args[] = {
ENA_DEVARG_LARGE_LLQ_HDR,
+ NULL,
};
struct rte_kvargs *kvlist;
int rc;
static void ena_update_on_link_change(void *adapter_data,
struct ena_admin_aenq_entry *aenq_e)
{
- struct rte_eth_dev *eth_dev;
- struct ena_adapter *adapter;
+ struct rte_eth_dev *eth_dev = adapter_data;
+ struct ena_adapter *adapter = eth_dev->data->dev_private;
struct ena_admin_aenq_link_change_desc *aenq_link_desc;
uint32_t status;
- adapter = adapter_data;
aenq_link_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e;
- eth_dev = adapter->rte_dev;
status = get_ena_admin_aenq_link_change_desc_link_status(aenq_link_desc);
adapter->link_status = status;
rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_INTR_LSC, NULL);
}
-static void ena_notification(void *data,
+static void ena_notification(void *adapter_data,
struct ena_admin_aenq_entry *aenq_e)
{
- struct ena_adapter *adapter = data;
+ struct rte_eth_dev *eth_dev = adapter_data;
+ struct ena_adapter *adapter = eth_dev->data->dev_private;
struct ena_admin_ena_hw_hints *hints;
if (aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION)
aenq_e->aenq_common_desc.group,
ENA_ADMIN_NOTIFICATION);
- switch (aenq_e->aenq_common_desc.syndrom) {
+ switch (aenq_e->aenq_common_desc.syndrome) {
case ENA_ADMIN_UPDATE_HINTS:
hints = (struct ena_admin_ena_hw_hints *)
(&aenq_e->inline_data_w4);
break;
default:
PMD_DRV_LOG(ERR, "Invalid aenq notification link state %d\n",
- aenq_e->aenq_common_desc.syndrom);
+ aenq_e->aenq_common_desc.syndrome);
}
}
static void ena_keep_alive(void *adapter_data,
__rte_unused struct ena_admin_aenq_entry *aenq_e)
{
- struct ena_adapter *adapter = adapter_data;
+ struct rte_eth_dev *eth_dev = adapter_data;
+ struct ena_adapter *adapter = eth_dev->data->dev_private;
struct ena_admin_aenq_keep_alive_desc *desc;
uint64_t rx_drops;
uint64_t tx_drops;
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