#define ENETC_DEV_ID_VF 0xef00
#define ENETC_DEV_ID 0xe100
+/* BD RING ALIGNMENT */
+#define ENETC_BD_RING_ALIGN 128
+
/* ENETC register block BAR */
#define ENETC_BAR_REGS 0x0
#define ENETC_PSR 0x00004 /* RO */
#define ENETC_PSIPMR 0x00018
#define ENETC_PSIPMR_SET_UP(n) (0x1 << (n)) /* n = SI index */
-#define ENETC_PSIPMR_SET_MP(n) (0x1 << ((n) + 8))
-#define ENETC_PSIPMR_SET_VLAN_MP(n) (0x1 << ((n) + 16))
+#define ENETC_PSIPMR_SET_MP(n) (0x1 << ((n) + 16))
#define ENETC_PSIPMAR0(n) (0x00100 + (n) * 0x20)
#define ENETC_PSIPMAR1(n) (0x00104 + (n) * 0x20)
#define ENETC_PCAPR0 0x00900
#define ENETC_PM0_CMD_CFG 0x08008
#define ENETC_PM0_TX_EN BIT(0)
#define ENETC_PM0_RX_EN BIT(1)
+#define ENETC_PM0_CRC BIT(6)
+
+#define ENETC_PAR_PORT_CFG 0x03050
+#define L3_CKSUM BIT(0)
+#define L4_CKSUM BIT(1)
#define ENETC_PM0_MAXFRM 0x08014
-#define ENETC_SET_MAXFRM(val) ((val) << 16)
+#define ENETC_SET_TX_MTU(val) ((val) << 16)
+#define ENETC_SET_MAXFRM(val) ((val) & 0xffff)
+#define ENETC_PTXMBAR 0x0608
+/* n = TC index [0..7] */
+#define ENETC_PTCMSDUR(n) (0x2020 + (n) * 4)
#define ENETC_PM0_STATUS 0x08304
#define ENETC_LINK_MODE 0x0000000000080000ULL
#define ENETC_TXBD_FLAGS_F BIT(15)
/* ENETC Parsed values (Little Endian) */
+#define ENETC_PARSE_ERROR 0x8000
#define ENETC_PKT_TYPE_ETHER 0x0060
#define ENETC_PKT_TYPE_IPV4 0x0000
#define ENETC_PKT_TYPE_IPV6 0x0020
};
struct enetc_eth_mac_info {
- uint8_t addr[ETHER_ADDR_LEN];
- uint8_t perm_addr[ETHER_ADDR_LEN];
+ uint8_t addr[RTE_ETHER_ADDR_LEN];
+ uint8_t perm_addr[RTE_ETHER_ADDR_LEN];
uint8_t get_link_status;
};