/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
*/
#include <stdbool.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_pci.h>
+#include <rte_random.h>
+#include <dpaax_iova_table.h>
#include "enetc_logs.h"
#include "enetc.h"
-int enetc_logtype_pmd;
-
static int
enetc_dev_start(struct rte_eth_dev *dev)
{
return 0;
}
-static void
+static int
enetc_dev_stop(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
uint32_t val;
PMD_INIT_FUNC_TRACE();
+ dev->data->dev_started = 0;
/* Disable port */
val = enetc_port_rd(enetc_hw, ENETC_PMR);
enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
+
+ return 0;
}
static const uint32_t *
return rte_eth_linkstatus_set(dev, &link);
}
+static void
+print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)
+{
+ char buf[RTE_ETHER_ADDR_FMT_SIZE];
+
+ rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);
+ ENETC_PMD_NOTICE("%s%s\n", name, buf);
+}
+
static int
enetc_hardware_init(struct enetc_eth_hw *hw)
{
struct enetc_hw *enetc_hw = &hw->hw;
uint32_t *mac = (uint32_t *)hw->mac.addr;
+ uint32_t high_mac = 0;
+ uint16_t low_mac = 0;
PMD_INIT_FUNC_TRACE();
/* Calculating and storing the base HW addresses */
hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
+ /* WA for Rx lock-up HW erratum */
+ enetc_port_wr(enetc_hw, ENETC_PM0_RX_FIFO, 1);
+
+ /* set ENETC transaction flags to coherent, don't allocate.
+ * BD writes merge with surrounding cache line data, frame data writes
+ * overwrite cache line.
+ */
+ enetc_wr(enetc_hw, ENETC_SICAR0, ENETC_SICAR0_COHERENT);
+
/* Enabling Station Interface */
enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
*mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0));
+ high_mac = (uint32_t)*mac;
mac++;
*mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0));
+ low_mac = (uint16_t)*mac;
+
+ if ((high_mac | low_mac) == 0) {
+ char *first_byte;
+
+ ENETC_PMD_NOTICE("MAC is not available for this SI, "
+ "set random MAC\n");
+ mac = (uint32_t *)hw->mac.addr;
+ *mac = (uint32_t)rte_rand();
+ first_byte = (char *)mac;
+ *first_byte &= 0xfe; /* clear multicast bit */
+ *first_byte |= 0x02; /* set local assignment bit (IEEE802) */
+
+ enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), *mac);
+ mac++;
+ *mac = (uint16_t)rte_rand();
+ enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), *mac);
+ print_ethaddr("New address: ",
+ (const struct rte_ether_addr *)hw->mac.addr);
+ }
return 0;
}
-static void
+static int
enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
struct rte_eth_dev_info *dev_info)
{
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_KEEP_CRC |
DEV_RX_OFFLOAD_JUMBO_FRAME);
+
+ return 0;
}
static int
int size;
size = nb_desc * sizeof(struct enetc_swbd);
- txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
+ txr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
if (txr->q_swbd == NULL)
return -ENOMEM;
size = nb_desc * sizeof(struct enetc_tx_bd);
- txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
+ txr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
if (txr->bd_base == NULL) {
rte_free(txr->q_swbd);
txr->q_swbd = NULL;
int size;
size = nb_rx_desc * sizeof(struct enetc_swbd);
- rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
+ rxr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
if (rxr->q_swbd == NULL)
return -ENOMEM;
size = nb_rx_desc * sizeof(union enetc_rx_bd);
- rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
+ rxr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
if (rxr->bd_base == NULL) {
rte_free(rxr->q_swbd);
rxr->q_swbd = NULL;
return 0;
}
-static void
+static int
enetc_stats_reset(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
struct enetc_hw *enetc_hw = &hw->hw;
enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
+
+ return 0;
}
-static void
+static int
enetc_dev_close(struct rte_eth_dev *dev)
{
uint16_t i;
+ int ret;
PMD_INIT_FUNC_TRACE();
- enetc_dev_stop(dev);
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ ret = enetc_dev_stop(dev);
for (i = 0; i < dev->data->nb_rx_queues; i++) {
enetc_rx_queue_release(dev->data->rx_queues[i]);
dev->data->tx_queues[i] = NULL;
}
dev->data->nb_tx_queues = 0;
+
+ if (rte_eal_iova_mode() == RTE_IOVA_PA)
+ dpaax_iova_table_depopulate();
+
+ return ret;
}
-static void
+static int
enetc_promiscuous_enable(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
+
+ return 0;
}
-static void
+static int
enetc_promiscuous_disable(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
psipmr &= (~ENETC_PSIPMR_SET_MP(0));
enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
+
+ return 0;
}
-static void
+static int
enetc_allmulticast_enable(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
psipmr |= ENETC_PSIPMR_SET_MP(0);
enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
+
+ return 0;
}
-static void
+static int
enetc_allmulticast_disable(struct rte_eth_dev *dev)
{
struct enetc_eth_hw *hw =
uint32_t psipmr = 0;
if (dev->data->promiscuous == 1)
- return; /* must remain in all_multicast mode */
+ return 0; /* must remain in all_multicast mode */
/* Setting to disable all multicast mode for SI0*/
psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) &
~(ENETC_PSIPMR_SET_MP(0));
enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
+
+ return 0;
}
static int
return -EINVAL;
}
- if (frame_size > RTE_ETHER_MAX_LEN)
+ if (frame_size > ENETC_ETH_MAX_LEN)
dev->data->dev_conf.rxmode.offloads &=
DEV_RX_OFFLOAD_JUMBO_FRAME;
else
eth_dev->rx_pkt_burst = &enetc_recv_pkts;
eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
+
/* Retrieving and storing the HW base address of device */
hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
hw->device_id = pci_dev->id.device_id;
eth_dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN -
RTE_ETHER_CRC_LEN;
+ if (rte_eal_iova_mode() == RTE_IOVA_PA)
+ dpaax_iova_table_populate();
+
ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);
}
static int
-enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
+enetc_dev_uninit(struct rte_eth_dev *eth_dev)
{
PMD_INIT_FUNC_TRACE();
- return 0;
+
+ return enetc_dev_close(eth_dev);
}
static int
RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
-
-RTE_INIT(enetc_pmd_init_log)
-{
- enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
- if (enetc_logtype_pmd >= 0)
- rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
-}
+RTE_LOG_REGISTER(enetc_logtype_pmd, pmd.net.enetc, NOTICE);