net/ice: enable switch flow on DCF

[dpdk.git] / drivers / net / enic / base / cq_desc.h

diff --git a/drivers/net/enic/base/cq_desc.h b/drivers/net/enic/base/cq_desc.h
index 7e13802..7151353 100644 (file)
--- a/drivers/net/enic/base/cq_desc.h
+++ b/drivers/net/enic/base/cq_desc.h
@@ -5,6 +5,7 @@
 
 #ifndef _CQ_DESC_H_
 #define _CQ_DESC_H_
+#include <rte_byteorder.h>
 
 /*
  * Completion queue descriptor types
@@ -24,26 +25,27 @@ enum cq_desc_types {
 /* Completion queue descriptor: 16B
  *
  * All completion queues have this basic layout.  The
- * type_specfic area is unique for each completion
+ * type_specific area is unique for each completion
  * queue type.
  */
 struct cq_desc {
-       __le16 completed_index;
-       __le16 q_number;
-       u8 type_specfic[11];
-       u8 type_color;
+       uint16_t completed_index;
+       uint16_t q_number;
+       uint8_t type_specific[11];
+       uint8_t type_color;
 };
 
 #define CQ_DESC_TYPE_BITS        4
 #define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)
 #define CQ_DESC_COLOR_MASK       1
 #define CQ_DESC_COLOR_SHIFT      7
+#define CQ_DESC_COLOR_MASK_NOSHIFT 0x80
 #define CQ_DESC_Q_NUM_BITS       10
 #define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)
 #define CQ_DESC_COMP_NDX_BITS    12
 #define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
 
-static inline void cq_color_enc(struct cq_desc *desc, const u8 color)
+static inline void cq_color_enc(struct cq_desc *desc, const uint8_t color)
 {
        if (color)
                desc->type_color |=  (1 << CQ_DESC_COLOR_SHIFT);
@@ -52,21 +54,22 @@ static inline void cq_color_enc(struct cq_desc *desc, const u8 color)
 }
 
 static inline void cq_desc_enc(struct cq_desc *desc,
-       const u8 type, const u8 color, const u16 q_number,
-       const u16 completed_index)
+       const uint8_t type, const uint8_t color, const uint16_t q_number,
+       const uint16_t completed_index)
 {
        desc->type_color = (type & CQ_DESC_TYPE_MASK) |
                ((color & CQ_DESC_COLOR_MASK) << CQ_DESC_COLOR_SHIFT);
-       desc->q_number = cpu_to_le16(q_number & CQ_DESC_Q_NUM_MASK);
-       desc->completed_index = cpu_to_le16(completed_index &
+       desc->q_number = rte_cpu_to_le_16(q_number & CQ_DESC_Q_NUM_MASK);
+       desc->completed_index = rte_cpu_to_le_16(completed_index &
                CQ_DESC_COMP_NDX_MASK);
 }
 
 static inline void cq_desc_dec(const struct cq_desc *desc_arg,
-       u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
+       uint8_t *type, uint8_t *color, uint16_t *q_number,
+       uint16_t *completed_index)
 {
        const struct cq_desc *desc = desc_arg;
-       const u8 type_color = desc->type_color;
+       const uint8_t type_color = desc->type_color;
 
        *color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
 
@@ -78,15 +81,15 @@ static inline void cq_desc_dec(const struct cq_desc *desc_arg,
         * result in reading stale values.
         */
 
-       rmb();
+       rte_rmb();
 
        *type = type_color & CQ_DESC_TYPE_MASK;
-       *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
-       *completed_index = le16_to_cpu(desc->completed_index) &
+       *q_number = rte_le_to_cpu_16(desc->q_number) & CQ_DESC_Q_NUM_MASK;
+       *completed_index = rte_le_to_cpu_16(desc->completed_index) &
                CQ_DESC_COMP_NDX_MASK;
 }
 
-static inline void cq_color_dec(const struct cq_desc *desc_arg, u8 *color)
+static inline void cq_color_dec(const struct cq_desc *desc_arg, uint8_t *color)
 {
        volatile const struct cq_desc *desc = desc_arg;