*/
#include "enic_compat.h"
-#include "rte_ethdev_driver.h"
+#include "ethdev_driver.h"
#include "wq_enet_desc.h"
#include "rq_enet_desc.h"
#include "cq_enet_desc.h"
{
struct vnic_enet_config *c = &enic->config;
int err;
+ uint64_t sizes;
err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
if (err) {
if (c->mtu == 0)
c->mtu = 1500;
- enic->rte_dev->data->mtu = min_t(uint16_t, enic->max_mtu,
- max_t(uint16_t, ENIC_MIN_MTU, c->mtu));
+ enic->rte_dev->data->mtu = RTE_MIN(enic->max_mtu,
+ RTE_MAX((uint16_t)ENIC_MIN_MTU, c->mtu));
enic->adv_filters = vnic_dev_capable_adv_filters(enic->vdev);
dev_info(enic, "Advanced Filters %savailable\n", ((enic->adv_filters)
((enic->filter_actions & FILTER_ACTION_COUNTER_FLAG) ?
"count " : ""));
- c->wq_desc_count =
- min_t(uint32_t, ENIC_MAX_WQ_DESCS,
- max_t(uint32_t, ENIC_MIN_WQ_DESCS,
- c->wq_desc_count));
+ c->wq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_WQ_DESCS,
+ RTE_MAX((uint32_t)ENIC_MIN_WQ_DESCS, c->wq_desc_count));
c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
- c->rq_desc_count =
- min_t(uint32_t, ENIC_MAX_RQ_DESCS,
- max_t(uint32_t, ENIC_MIN_RQ_DESCS,
- c->rq_desc_count));
+ c->rq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_RQ_DESCS,
+ RTE_MAX((uint32_t)ENIC_MIN_RQ_DESCS, c->rq_desc_count));
c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
- c->intr_timer_usec = min_t(uint32_t, c->intr_timer_usec,
- vnic_dev_get_intr_coal_timer_max(enic->vdev));
+ c->intr_timer_usec = RTE_MIN(c->intr_timer_usec,
+ vnic_dev_get_intr_coal_timer_max(enic->vdev));
dev_info(enic_get_dev(enic),
"vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
dev_info(NULL, "Geneve with options offload available\n");
enic->geneve_opt_avail = 1;
}
+ /* Supported CQ entry sizes */
+ enic->cq_entry_sizes = vnic_dev_capable_cq_entry_size(enic->vdev);
+ sizes = enic->cq_entry_sizes;
+ dev_debug(NULL, "Supported CQ entry sizes:%s%s%s\n",
+ (sizes & VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE) ? " 16" : "",
+ (sizes & VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE) ? " 32" : "",
+ (sizes & VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE) ? " 64" : "");
+ /* Use 64B entry if requested and available */
+ enic->cq64 = enic->cq64_request &&
+ (sizes & VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE);
+ dev_debug(NULL, "Using %sB CQ entry size\n", enic->cq64 ? "64" : "16");
+
/*
* Default hardware capabilities. enic_dev_init() may add additional
* flags if it enables overlay offloads.