examples/l3fwd: share queue size variables
[dpdk.git] / drivers / net / enic / enic_res.c
index 689bf74..caf773b 100644 (file)
@@ -26,6 +26,7 @@ int enic_get_vnic_config(struct enic *enic)
        struct vnic_enet_config *c = &enic->config;
        int err;
        uint64_t sizes;
+       uint32_t max_rq_descs, max_wq_descs;
 
        err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
        if (err) {
@@ -57,6 +58,8 @@ int enic_get_vnic_config(struct enic *enic)
        GET_CONFIG(loop_tag);
        GET_CONFIG(num_arfs);
        GET_CONFIG(max_pkt_size);
+       GET_CONFIG(max_rq_ring);
+       GET_CONFIG(max_wq_ring);
 
        /* max packet size is only defined in newer VIC firmware
         * and will be 0 for legacy firmware and VICs
@@ -101,20 +104,29 @@ int enic_get_vnic_config(struct enic *enic)
                ((enic->filter_actions & FILTER_ACTION_COUNTER_FLAG) ?
                 "count " : ""));
 
-       c->wq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_WQ_DESCS,
+       /* The max size of RQ and WQ rings are specified in 1500 series VICs and
+        * beyond. If they are not specified by the VIC or if 64B CQ descriptors
+        * are not being used, the max number of descriptors is 4096.
+        */
+       max_wq_descs = (enic->cq64_request && c->max_wq_ring) ? c->max_wq_ring :
+                      ENIC_LEGACY_MAX_WQ_DESCS;
+       c->wq_desc_count = RTE_MIN(max_wq_descs,
                        RTE_MAX((uint32_t)ENIC_MIN_WQ_DESCS, c->wq_desc_count));
        c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
-
-       c->rq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_RQ_DESCS,
+       max_rq_descs = (enic->cq64_request && c->max_rq_ring) ? c->max_rq_ring
+                      : ENIC_LEGACY_MAX_WQ_DESCS;
+       c->rq_desc_count = RTE_MIN(max_rq_descs,
                        RTE_MAX((uint32_t)ENIC_MIN_RQ_DESCS, c->rq_desc_count));
        c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
+       dev_debug(NULL, "Max supported VIC descriptors: WQ:%u, RQ:%u\n",
+                 max_wq_descs, max_rq_descs);
 
        c->intr_timer_usec = RTE_MIN(c->intr_timer_usec,
                                  vnic_dev_get_intr_coal_timer_max(enic->vdev));
 
        dev_info(enic_get_dev(enic),
-               "vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
-               "wq/rq %d/%d mtu %d, max mtu:%d\n",
+               "vNIC MAC addr " RTE_ETHER_ADDR_PRT_FMT
+               " wq/rq %d/%d mtu %d, max mtu:%d\n",
                enic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],
                enic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],
                c->wq_desc_count, c->rq_desc_count,
@@ -147,31 +159,31 @@ int enic_get_vnic_config(struct enic *enic)
                 * IPV4 hash type handles both non-frag and frag packet types.
                 * TCP/UDP is controlled via a separate flag below.
                 */
-               enic->flow_type_rss_offloads |= ETH_RSS_IPV4 |
-                       ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_IPV4 |
+                       RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_NONFRAG_IPV4_OTHER;
        if (ENIC_SETTING(enic, RSSHASH_TCPIPV4))
-               enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_TCP;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_NONFRAG_IPV4_TCP;
        if (ENIC_SETTING(enic, RSSHASH_IPV6))
                /*
                 * The VIC adapter can perform RSS on IPv6 packets with and
                 * without extension headers. An IPv6 "fragment" is an IPv6
                 * packet with the fragment extension header.
                 */
-               enic->flow_type_rss_offloads |= ETH_RSS_IPV6 |
-                       ETH_RSS_IPV6_EX | ETH_RSS_FRAG_IPV6 |
-                       ETH_RSS_NONFRAG_IPV6_OTHER;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_IPV6 |
+                       RTE_ETH_RSS_IPV6_EX | RTE_ETH_RSS_FRAG_IPV6 |
+                       RTE_ETH_RSS_NONFRAG_IPV6_OTHER;
        if (ENIC_SETTING(enic, RSSHASH_TCPIPV6))
-               enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_TCP |
-                       ETH_RSS_IPV6_TCP_EX;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_NONFRAG_IPV6_TCP |
+                       RTE_ETH_RSS_IPV6_TCP_EX;
        if (enic->udp_rss_weak)
                enic->flow_type_rss_offloads |=
-                       ETH_RSS_NONFRAG_IPV4_UDP | ETH_RSS_NONFRAG_IPV6_UDP |
-                       ETH_RSS_IPV6_UDP_EX;
+                       RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_NONFRAG_IPV6_UDP |
+                       RTE_ETH_RSS_IPV6_UDP_EX;
        if (ENIC_SETTING(enic, RSSHASH_UDPIPV4))
-               enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_UDP;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_NONFRAG_IPV4_UDP;
        if (ENIC_SETTING(enic, RSSHASH_UDPIPV6))
-               enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_UDP |
-                       ETH_RSS_IPV6_UDP_EX;
+               enic->flow_type_rss_offloads |= RTE_ETH_RSS_NONFRAG_IPV6_UDP |
+                       RTE_ETH_RSS_IPV6_UDP_EX;
 
        /* Zero offloads if RSS is not enabled */
        if (!ENIC_SETTING(enic, RSS))
@@ -179,10 +191,9 @@ int enic_get_vnic_config(struct enic *enic)
 
        enic->vxlan = ENIC_SETTING(enic, VXLAN) &&
                vnic_dev_capable_vxlan(enic->vdev);
-       if (vnic_dev_capable_geneve(enic->vdev)) {
-               dev_info(NULL, "Geneve with options offload available\n");
-               enic->geneve_opt_avail = 1;
-       }
+       enic->geneve = ENIC_SETTING(enic, GENEVE) &&
+               vnic_dev_capable_geneve(enic->vdev);
+
        /* Supported CQ entry sizes */
        enic->cq_entry_sizes = vnic_dev_capable_cq_entry_size(enic->vdev);
        sizes = enic->cq_entry_sizes;
@@ -202,27 +213,26 @@ int enic_get_vnic_config(struct enic *enic)
        enic->tx_queue_offload_capa = 0;
        enic->tx_offload_capa =
                enic->tx_queue_offload_capa |
-               DEV_TX_OFFLOAD_MULTI_SEGS |
-               DEV_TX_OFFLOAD_VLAN_INSERT |
-               DEV_TX_OFFLOAD_IPV4_CKSUM |
-               DEV_TX_OFFLOAD_UDP_CKSUM |
-               DEV_TX_OFFLOAD_TCP_CKSUM |
-               DEV_TX_OFFLOAD_TCP_TSO;
+               RTE_ETH_TX_OFFLOAD_MULTI_SEGS |
+               RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
+               RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
+               RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
+               RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
+               RTE_ETH_TX_OFFLOAD_TCP_TSO;
        enic->rx_offload_capa =
-               DEV_RX_OFFLOAD_SCATTER |
-               DEV_RX_OFFLOAD_JUMBO_FRAME |
-               DEV_RX_OFFLOAD_VLAN_STRIP |
-               DEV_RX_OFFLOAD_IPV4_CKSUM |
-               DEV_RX_OFFLOAD_UDP_CKSUM |
-               DEV_RX_OFFLOAD_TCP_CKSUM |
-               DEV_RX_OFFLOAD_RSS_HASH;
+               RTE_ETH_RX_OFFLOAD_SCATTER |
+               RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
+               RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
+               RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
+               RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
+               RTE_ETH_RX_OFFLOAD_RSS_HASH;
        enic->tx_offload_mask =
-               PKT_TX_IPV6 |
-               PKT_TX_IPV4 |
-               PKT_TX_VLAN |
-               PKT_TX_IP_CKSUM |
-               PKT_TX_L4_MASK |
-               PKT_TX_TCP_SEG;
+               RTE_MBUF_F_TX_IPV6 |
+               RTE_MBUF_F_TX_IPV4 |
+               RTE_MBUF_F_TX_VLAN |
+               RTE_MBUF_F_TX_IP_CKSUM |
+               RTE_MBUF_F_TX_L4_MASK |
+               RTE_MBUF_F_TX_TCP_SEG;
 
        return 0;
 }