net/mlx5: remove memory region support

[dpdk.git] / drivers / net / fm10k / base / fm10k_osdep.h

diff --git a/drivers/net/fm10k/base/fm10k_osdep.h b/drivers/net/fm10k/base/fm10k_osdep.h
index 6852ef0..199ebd8 100644 (file)
--- a/drivers/net/fm10k/base/fm10k_osdep.h
+++ b/drivers/net/fm10k/base/fm10k_osdep.h
@@ -39,6 +39,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #include <rte_atomic.h>
 #include <rte_byteorder.h>
 #include <rte_cycles.h>
+#include <rte_io.h>
+
 #include "../fm10k_logs.h"
 
 /* TODO: this does not look like it should be used... */
@@ -88,17 +90,16 @@ typedef int        bool;
 #endif
 
 /* offsets are WORD offsets, not BYTE offsets */
-#define FM10K_WRITE_REG(hw, reg, val)    \
-       ((((volatile uint32_t *)(hw)->hw_addr)[(reg)]) = ((uint32_t)(val)))
-#define FM10K_READ_REG(hw, reg)          \
-       (((volatile uint32_t *)(hw)->hw_addr)[(reg)])
+#define FM10K_WRITE_REG(hw, reg, val)          \
+       rte_write32((val), ((hw)->hw_addr + (reg)))
+
+#define FM10K_READ_REG(hw, reg) rte_read32(((hw)->hw_addr + (reg)))
+
 #define FM10K_WRITE_FLUSH(a) FM10K_READ_REG(a, FM10K_CTRL)
 
-#define FM10K_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define FM10K_PCI_REG(reg) rte_read32(reg)
 
-#define FM10K_PCI_REG_WRITE(reg, value) do { \
-       FM10K_PCI_REG((reg)) = (value); \
-} while (0)
+#define FM10K_PCI_REG_WRITE(reg, value) rte_write32((value), (reg))
 
 /* not implemented */
 #define FM10K_READ_PCI_WORD(hw, reg)     0
@@ -150,6 +151,21 @@ typedef int        bool;
 #define fm10k_read_reg FM10K_READ_REG
 #endif
 
+#define FM10K_INTEL_VENDOR_ID       0x8086
+#define FM10K_DMA_CTRL_MINMSS_SHIFT            9
+#define FM10K_EICR_PCA_FAULT                   0x00000001
+#define FM10K_EICR_THI_FAULT                   0x00000004
+#define FM10K_EICR_FUM_FAULT                   0x00000020
+#define FM10K_EICR_SRAMERROR                   0x00000400
+#define FM10K_SRAM_IP          0x13003
+#define FM10K_RXINT_TIMER_SHIFT                        8
+#define FM10K_TXINT_TIMER_SHIFT                        8
+#define FM10K_RXD_PKTTYPE_MASK         0x03F0
+#define FM10K_RXD_PKTTYPE_SHIFT                4
+
+#define FM10K_RXD_STATUS_IPCS          0x0008 /* Indicates IPv4 csum */
+#define FM10K_RXD_STATUS_HBO           0x0400 /* header buffer overrun */
+
 #define FM10K_TSO_MINMSS \
        (FM10K_DMA_CTRL_MINMSS_64 >> FM10K_DMA_CTRL_MINMSS_SHIFT)
 #define FM10K_TSO_MIN_HEADERLEN                        54