fm10k/base: fix TLV structures alignment

[dpdk.git] / drivers / net / fm10k / base / fm10k_type.h

diff --git a/drivers/net/fm10k/base/fm10k_type.h b/drivers/net/fm10k/base/fm10k_type.h
index fed8cbe..c4e5450 100644 (file)
--- a/drivers/net/fm10k/base/fm10k_type.h
+++ b/drivers/net/fm10k/base/fm10k_type.h
@@ -43,6 +43,18 @@ struct fm10k_hw;
 #define FM10K_INTEL_VENDOR_ID          0x8086
 #define FM10K_DEV_ID_PF                        0x15A4
 #define FM10K_DEV_ID_VF                        0x15A5
+#ifdef BOULDER_RAPIDS_HW
+#define FM10K_DEV_ID_SDI_FM10420_QDA2  0x15D0
+#endif /* BOULDER_RAPIDS_HW */
+#ifdef ATWOOD_CHANNEL_HW
+#define FM10K_DEV_ID_SDI_FM10420_DA2   0x15D5
+#endif /* ATWOOD_CHANNEL_HW */
+
+#ifndef LINUX_MACROS
+#ifndef BIT
+#define BIT(a) (1UL << (a))
+#endif
+#endif /* LINUX_MACROS */
 
 #define FM10K_MAX_QUEUES               256
 #define FM10K_MAX_QUEUES_PF            128
@@ -344,11 +356,20 @@ struct fm10k_hw;
 #define FM10K_TDBAL(_n)                ((0x40 * (_n)) + 0x8000)
 #define FM10K_TDBAH(_n)                ((0x40 * (_n)) + 0x8001)
 #define FM10K_TDLEN(_n)                ((0x40 * (_n)) + 0x8002)
+/* When fist initialized, VFs need to know the Interrupt Throttle Rate (ITR)
+ * scale which is based on the PCIe speed but the speed information in the PCI
+ * configuration space may not be accurate. The PF already knows the ITR scale
+ * but there is no defined method to pass that information from the PF to the
+ * VF. This is accomplished during VF initialization by temporarily co-opting
+ * the yet-to-be-used TDLEN register to have the PF store the ITR shift for
+ * the VF to retrieve before the VF needs to use the TDLEN register for its
+ * intended purpose, i.e. before the Tx resources are allocated.
+ */
 #define FM10K_TDLEN_ITR_SCALE_SHIFT            9
 #define FM10K_TDLEN_ITR_SCALE_MASK             0x00000E00
-#define FM10K_TDLEN_ITR_SCALE_GEN1             4
-#define FM10K_TDLEN_ITR_SCALE_GEN2             2
-#define FM10K_TDLEN_ITR_SCALE_GEN3             1
+#define FM10K_TDLEN_ITR_SCALE_GEN1             2
+#define FM10K_TDLEN_ITR_SCALE_GEN2             1
+#define FM10K_TDLEN_ITR_SCALE_GEN3             0
 #define FM10K_TPH_TXCTRL(_n)   ((0x40 * (_n)) + 0x8003)
 #define FM10K_TPH_TXCTRL_DESC_TPHEN            0x00000020
 #define FM10K_TPH_TXCTRL_DESC_RROEN            0x00000200
@@ -450,7 +471,7 @@ struct fm10k_hw;
 #define FM10K_VLAN_TABLE_VID_MAX               4096
 #define FM10K_VLAN_TABLE_VSI_MAX               64
 #define FM10K_VLAN_LENGTH_SHIFT                        16
-#define FM10K_VLAN_CLEAR                       (1 << 15)
+#define FM10K_VLAN_CLEAR                       BIT(15)
 #define FM10K_VLAN_ALL \
        ((FM10K_VLAN_TABLE_VID_MAX - 1) << FM10K_VLAN_LENGTH_SHIFT)
 
@@ -486,7 +507,7 @@ struct fm10k_hw;
 #define FM10K_SW_SYSTIME_CFG_ADJUST_MASK       0xFF000000
 #define FM10K_SW_SYSTIME_ADJUST        0x0224D
 #define FM10K_SW_SYSTIME_ADJUST_MASK           0x3FFFFFFF
-#define FM10K_SW_SYSTIME_ADJUST_DIR_NEGATIVE   0x80000000
+#define FM10K_SW_SYSTIME_ADJUST_DIR_POSITIVE   0x80000000
 #define FM10K_SW_SYSTIME_PULSE(_n)     ((_n) + 0x02252)
 
 #ifndef ETH_ALEN
@@ -510,13 +531,13 @@ struct fm10k_hw;
 #endif
 
 enum fm10k_int_source {
-       fm10k_int_Mailbox       = 0,
-       fm10k_int_PCIeFault     = 1,
-       fm10k_int_SwitchUpDown  = 2,
-       fm10k_int_SwitchEvent   = 3,
-       fm10k_int_SRAM          = 4,
-       fm10k_int_VFLR          = 5,
-       fm10k_int_MaxHoldTime   = 6,
+       fm10k_int_mailbox               = 0,
+       fm10k_int_pcie_fault            = 1,
+       fm10k_int_switch_up_down        = 2,
+       fm10k_int_switch_event          = 3,
+       fm10k_int_sram                  = 4,
+       fm10k_int_vflr                  = 5,
+       fm10k_int_max_hold_time         = 6,
        fm10k_int_sources_max_pf
 };
 
@@ -658,7 +679,9 @@ struct fm10k_mac_ops {
        s32 (*stop_hw)(struct fm10k_hw *);
        s32 (*get_bus_info)(struct fm10k_hw *);
        s32 (*get_host_state)(struct fm10k_hw *, bool *);
+#ifndef NO_IS_SLOT_APPROPRIATE_CHECK
        bool (*is_slot_appropriate)(struct fm10k_hw *);
+#endif
        s32 (*update_vlan)(struct fm10k_hw *, u32, u8, bool);
        s32 (*read_mac_addr)(struct fm10k_hw *);
        s32 (*update_uc_addr)(struct fm10k_hw *, u16, const u8 *,
@@ -748,10 +771,10 @@ struct fm10k_vf_info {
                                                 */
 };
 
-#define FM10K_VF_FLAG_ALLMULTI_CAPABLE ((u8)1 << FM10K_XCAST_MODE_ALLMULTI)
-#define FM10K_VF_FLAG_MULTI_CAPABLE    ((u8)1 << FM10K_XCAST_MODE_MULTI)
-#define FM10K_VF_FLAG_PROMISC_CAPABLE  ((u8)1 << FM10K_XCAST_MODE_PROMISC)
-#define FM10K_VF_FLAG_NONE_CAPABLE     ((u8)1 << FM10K_XCAST_MODE_NONE)
+#define FM10K_VF_FLAG_ALLMULTI_CAPABLE (u8)(BIT(FM10K_XCAST_MODE_ALLMULTI))
+#define FM10K_VF_FLAG_MULTI_CAPABLE    (u8)(BIT(FM10K_XCAST_MODE_MULTI))
+#define FM10K_VF_FLAG_PROMISC_CAPABLE  (u8)(BIT(FM10K_XCAST_MODE_PROMISC))
+#define FM10K_VF_FLAG_NONE_CAPABLE     (u8)(BIT(FM10K_XCAST_MODE_NONE))
 #define FM10K_VF_FLAG_CAPABLE(vf_info) ((vf_info)->vf_flags & (u8)0xF)
 #define FM10K_VF_FLAG_ENABLED(vf_info) ((vf_info)->vf_flags >> 4)
 #define FM10K_VF_FLAG_SET_MODE(mode)   ((u8)0x10 << (mode))
@@ -802,7 +825,7 @@ struct fm10k_hw {
        u16 subsystem_vendor_id;
        u8 revision_id;
        u32 flags;
-#define FM10K_HW_FLAG_CLOCK_OWNER      (u32)(1 << 0)
+#define FM10K_HW_FLAG_CLOCK_OWNER      BIT(0)
 };
 
 /* Number of Transmit and Receive Descriptors must be a multiple of 8 */