* Copyright(c) 2017 Huawei Technologies Co., Ltd
*/
-#include<rte_ethdev_driver.h>
+#include<ethdev_driver.h>
#include <rte_bus_pci.h>
#include <rte_hash.h>
#include <rte_jhash.h>
#include "hinic_pmd_cmdq.h"
#include "hinic_pmd_mgmt.h"
#include "hinic_pmd_niccfg.h"
+#include "hinic_pmd_mbox.h"
#define HINIC_DEAULT_EQ_MSIX_PENDING_LIMIT 0
#define HINIC_DEAULT_EQ_MSIX_COALESC_TIMER_CFG 0xFF
"Unrecognized module",
};
-static void *
-hinic_dma_mem_zalloc(struct hinic_hwdev *hwdev, size_t size,
- dma_addr_t *dma_handle, unsigned int flag, unsigned int align)
+struct hinic_vf_dma_attr_table {
+ struct hinic_mgmt_msg_head mgmt_msg_head;
+
+ u16 func_idx;
+ u8 func_dma_entry_num;
+ u8 entry_idx;
+ u8 st;
+ u8 at;
+ u8 ph;
+ u8 no_snooping;
+ u8 tph_en;
+ u8 resv1[3];
+};
+
+/**
+ * hinic_cpu_to_be32 - convert data to big endian 32 bit format
+ * @data: the data to convert
+ * @len: length of data to convert, must be Multiple of 4B
+ */
+void hinic_cpu_to_be32(void *data, u32 len)
+{
+ u32 i;
+ u32 *mem = (u32 *)data;
+
+ for (i = 0; i < (len >> 2); i++) {
+ *mem = cpu_to_be32(*mem);
+ mem++;
+ }
+}
+
+/**
+ * hinic_be32_to_cpu - convert data from big endian 32 bit format
+ * @data: the data to convert
+ * @len: length of data to convert, must be Multiple of 4B
+ */
+void hinic_be32_to_cpu(void *data, u32 len)
+{
+ u32 i;
+ u32 *mem = (u32 *)data;
+
+ for (i = 0; i < (len >> 2); i++) {
+ *mem = be32_to_cpu(*mem);
+ mem++;
+ }
+}
+
+static void *hinic_dma_mem_zalloc(struct hinic_hwdev *hwdev, size_t size,
+ dma_addr_t *dma_handle, unsigned int align,
+ unsigned int socket_id)
{
int rc, alloc_cnt;
const struct rte_memzone *mz;
snprintf(z_name, sizeof(z_name), "%s_%d",
hwdev->pcidev_hdl->name, alloc_cnt);
- mz = rte_memzone_reserve_aligned(z_name, size, SOCKET_ID_ANY,
- flag, align);
+ mz = rte_memzone_reserve_aligned(z_name, size, socket_id,
+ RTE_MEMZONE_IOVA_CONTIG, align);
if (!mz) {
PMD_DRV_LOG(ERR, "Alloc dma able memory failed, errno: %d, ma_name: %s, size: 0x%zx",
rte_errno, z_name, size);
(void)rte_memzone_free(mz);
}
-void *dma_zalloc_coherent(void *hwdev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+void *dma_zalloc_coherent(void *hwdev, size_t size, dma_addr_t *dma_handle,
+ unsigned int socket_id)
{
- return hinic_dma_mem_zalloc(hwdev, size, dma_handle, flag,
- RTE_CACHE_LINE_SIZE);
+ return hinic_dma_mem_zalloc(hwdev, size, dma_handle,
+ RTE_CACHE_LINE_SIZE, socket_id);
}
void *dma_zalloc_coherent_aligned(void *hwdev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, unsigned int socket_id)
{
- return hinic_dma_mem_zalloc(hwdev, size, dma_handle, flag,
- HINIC_PAGE_SIZE);
+ return hinic_dma_mem_zalloc(hwdev, size, dma_handle, HINIC_PAGE_SIZE,
+ socket_id);
}
void *dma_zalloc_coherent_aligned256k(void *hwdev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle,
+ unsigned int socket_id)
{
- return hinic_dma_mem_zalloc(hwdev, size, dma_handle, flag,
- HINIC_PAGE_SIZE * 64);
+ return hinic_dma_mem_zalloc(hwdev, size, dma_handle,
+ HINIC_PAGE_SIZE * 64, socket_id);
}
void dma_free_coherent(void *hwdev, size_t size, void *virt, dma_addr_t phys)
{
struct pci_pool *pool;
- pool = rte_zmalloc(NULL, sizeof(*pool), HINIC_MEM_ALLOC_ALIGNE_MIN);
+ pool = rte_zmalloc(NULL, sizeof(*pool), HINIC_MEM_ALLOC_ALIGN_MIN);
if (!pool)
return NULL;
- pool->inuse = 0;
+ rte_atomic32_set(&pool->inuse, 0);
pool->elem_size = size;
pool->align = align;
pool->boundary = boundary;
if (!pool)
return;
- if (pool->inuse != 0) {
- PMD_DRV_LOG(ERR, "Leak memory, dma_pool:%s, inuse_count:%u",
- pool->name, pool->inuse);
+ if (rte_atomic32_read(&pool->inuse) != 0) {
+ PMD_DRV_LOG(ERR, "Leak memory, dma_pool: %s, inuse_count: %d",
+ pool->name, rte_atomic32_read(&pool->inuse));
}
rte_free(pool);
}
-void *dma_pool_alloc(struct pci_pool *pool, int flags, dma_addr_t *dma_addr)
+void *dma_pool_alloc(struct pci_pool *pool, dma_addr_t *dma_addr)
{
void *buf;
- buf = hinic_dma_mem_zalloc(pool->hwdev, pool->elem_size,
- dma_addr, flags, (u32)pool->align);
+ buf = hinic_dma_mem_zalloc(pool->hwdev, pool->elem_size, dma_addr,
+ (u32)pool->align, SOCKET_ID_ANY);
if (buf)
- pool->inuse++;
+ rte_atomic32_inc(&pool->inuse);
return buf;
}
void dma_pool_free(struct pci_pool *pool, void *vaddr, dma_addr_t dma)
{
- pool->inuse--;
+ rte_atomic32_dec(&pool->inuse);
hinic_dma_mem_free(pool->hwdev, pool->elem_size, vaddr, dma);
}
-
-
#define HINIC_MAX_DMA_ENTRIES 8192
int hinic_osdep_init(struct hinic_hwdev *hwdev)
{
}
}
-
-
-
-
-
-
-
-
-
-
-
-
/**
* hinic_set_ci_table - set ci attribute table
* @hwdev: the hardware interface of a nic device
* @return
* 0 on success and ci attribute table is filled,
* negative error value otherwise.
- **/
+ */
int hinic_set_ci_table(void *hwdev, u16 q_id, struct hinic_sq_attr *attr)
{
struct hinic_cons_idx_attr cons_idx_attr;
+ u16 out_size = sizeof(cons_idx_attr);
+ int err;
memset(&cons_idx_attr, 0, sizeof(cons_idx_attr));
cons_idx_attr.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
cons_idx_attr.sq_id = q_id;
cons_idx_attr.ci_addr = attr->ci_dma_base;
- return hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
+ err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
HINIC_MGMT_CMD_L2NIC_SQ_CI_ATTR_SET,
&cons_idx_attr, sizeof(cons_idx_attr),
- NULL, NULL, 0);
+ &cons_idx_attr, &out_size, 0);
+ if (err || !out_size || cons_idx_attr.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Set ci attribute table failed, err: %d, status: 0x%x, out_size: 0x%x",
+ err, cons_idx_attr.mgmt_msg_head.status, out_size);
+ return -EIO;
+ }
+
+ return 0;
}
/**
* @return
* 0 on success,
* negative error value otherwise.
- **/
+ */
int hinic_set_pagesize(void *hwdev, u8 page_size)
{
- struct hinic_page_size cmd;
+ struct hinic_page_size page_size_info;
+ u16 out_size = sizeof(page_size_info);
+ int err;
if (page_size > HINIC_PAGE_SIZE_MAX) {
PMD_DRV_LOG(ERR, "Invalid page_size %u, bigger than %u",
return -EINVAL;
}
- memset(&cmd, 0, sizeof(cmd));
- cmd.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
- cmd.func_idx = hinic_global_func_id(hwdev);
- cmd.ppf_idx = hinic_ppf_idx(hwdev);
- cmd.page_size = page_size;
+ memset(&page_size_info, 0, sizeof(page_size_info));
+ page_size_info.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
+ page_size_info.func_idx = hinic_global_func_id(hwdev);
+ page_size_info.ppf_idx = hinic_ppf_idx(hwdev);
+ page_size_info.page_size = page_size;
- return hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
- HINIC_MGMT_CMD_PAGESIZE_SET,
- &cmd, sizeof(cmd),
- NULL, NULL, 0);
+ err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
+ HINIC_MGMT_CMD_PAGESIZE_SET,
+ &page_size_info, sizeof(page_size_info),
+ &page_size_info, &out_size, 0);
+ if (err || !out_size || page_size_info.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Set wq page size failed, err: %d, status: 0x%x, out_size: 0x%0x",
+ err, page_size_info.mgmt_msg_head.status, out_size);
+ return -EIO;
+ }
+
+ return 0;
}
static int wait_for_flr_finish(struct hinic_hwif *hwif)
do {
status = hinic_get_pf_status(hwif);
if (status == HINIC_PF_STATUS_FLR_FINISH_FLAG) {
- hinic_set_pf_status(hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
return 0;
}
rte_delay_ms(10);
} while (time_before(jiffies, end));
- return -EFAULT;
+ return -ETIMEDOUT;
}
#define HINIC_WAIT_CMDQ_IDLE_TIMEOUT 1000
return err;
}
+static int hinic_vf_rx_tx_flush(struct hinic_hwdev *hwdev)
+{
+ struct hinic_clear_resource clr_res;
+ int err;
+
+ err = wait_cmdq_stop(hwdev);
+ if (err) {
+ PMD_DRV_LOG(WARNING, "Cmdq is still working");
+ return err;
+ }
+
+ memset(&clr_res, 0, sizeof(clr_res));
+ clr_res.func_idx = HINIC_HWIF_GLOBAL_IDX(hwdev->hwif);
+ clr_res.ppf_idx = HINIC_HWIF_PPF_IDX(hwdev->hwif);
+ err = hinic_mbox_to_pf_no_ack(hwdev, HINIC_MOD_COMM,
+ HINIC_MGMT_CMD_START_FLR, &clr_res, sizeof(clr_res));
+ if (err)
+ PMD_DRV_LOG(WARNING, "Notice flush message failed");
+
+ /*
+ * PF firstly set VF doorbell flush csr to be disabled. After PF finish
+ * VF resources flush, PF will set VF doorbell flush csr to be enabled.
+ */
+ err = wait_until_doorbell_flush_states(hwdev->hwif, DISABLE_DOORBELL);
+ if (err)
+ PMD_DRV_LOG(WARNING, "Wait doorbell flush disable timeout");
+
+ err = wait_until_doorbell_flush_states(hwdev->hwif, ENABLE_DOORBELL);
+ if (err)
+ PMD_DRV_LOG(WARNING, "Wait doorbell flush enable timeout");
+
+ err = hinic_reinit_cmdq_ctxts(hwdev);
+ if (err)
+ PMD_DRV_LOG(WARNING, "Reinit cmdq failed when vf flush");
+
+ return err;
+}
+
/**
* hinic_pf_rx_tx_flush - clean up hardware resource
* @hwdev: the hardware interface of a nic device
* @return
* 0 on success,
* negative error value otherwise.
- **/
+ */
static int hinic_pf_rx_tx_flush(struct hinic_hwdev *hwdev)
{
struct hinic_hwif *hwif = hwdev->hwif;
struct hinic_clear_doorbell clear_db;
struct hinic_clear_resource clr_res;
+ u16 out_size;
int err;
+ int ret = 0;
rte_delay_ms(100);
}
hinic_disable_doorbell(hwif);
+ out_size = sizeof(clear_db);
memset(&clear_db, 0, sizeof(clear_db));
clear_db.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
clear_db.func_idx = HINIC_HWIF_GLOBAL_IDX(hwif);
clear_db.ppf_idx = HINIC_HWIF_PPF_IDX(hwif);
err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
HINIC_MGMT_CMD_FLUSH_DOORBELL, &clear_db,
- sizeof(clear_db), NULL, NULL, 0);
- if (err)
- PMD_DRV_LOG(WARNING, "Flush doorbell failed");
+ sizeof(clear_db), &clear_db, &out_size, 0);
+ if (err || !out_size || clear_db.mgmt_msg_head.status) {
+ PMD_DRV_LOG(WARNING, "Flush doorbell failed, err: %d, status: 0x%x, out_size: 0x%x",
+ err, clear_db.mgmt_msg_head.status, out_size);
+ ret = err ? err : (-EIO);
+ }
hinic_set_pf_status(hwif, HINIC_PF_STATUS_FLR_START_FLAG);
memset(&clr_res, 0, sizeof(clr_res));
err = hinic_msg_to_mgmt_no_ack(hwdev, HINIC_MOD_COMM,
HINIC_MGMT_CMD_START_FLR, &clr_res,
- sizeof(clr_res), NULL, NULL);
- if (err)
- PMD_DRV_LOG(WARNING, "Notice flush message failed");
+ sizeof(clr_res));
+ if (err) {
+ PMD_DRV_LOG(WARNING, "Notice flush msg failed, err: %d", err);
+ ret = err;
+ }
err = wait_for_flr_finish(hwif);
- if (err)
- PMD_DRV_LOG(WARNING, "Wait firmware FLR timeout");
+ if (err) {
+ PMD_DRV_LOG(WARNING, "Wait firmware FLR timeout, err: %d", err);
+ ret = err;
+ }
hinic_enable_doorbell(hwif);
err = hinic_reinit_cmdq_ctxts(hwdev);
- if (err)
- PMD_DRV_LOG(WARNING, "Reinit cmdq failed");
+ if (err) {
+ PMD_DRV_LOG(WARNING,
+ "Reinit cmdq failed when pf flush, err: %d", err);
+ ret = err;
+ }
- return 0;
+ return ret;
}
int hinic_func_rx_tx_flush(struct hinic_hwdev *hwdev)
{
- return hinic_pf_rx_tx_flush(hwdev);
+ if (HINIC_FUNC_TYPE(hwdev) == TYPE_VF)
+ return hinic_vf_rx_tx_flush(hwdev);
+ else
+ return hinic_pf_rx_tx_flush(hwdev);
}
/**
* @hwdev: the hardware interface of a nic device
* @interrupt_info: Information of Interrupt aggregation
* Return: 0 on success, negative error value otherwise.
- **/
+ */
static int hinic_get_interrupt_cfg(struct hinic_hwdev *hwdev,
struct nic_interrupt_info *interrupt_info)
{
&msix_cfg, sizeof(msix_cfg),
&msix_cfg, &out_size, 0);
if (err || !out_size || msix_cfg.mgmt_msg_head.status) {
- PMD_DRV_LOG(ERR, "Get interrupt config failed, ret: %d",
- msix_cfg.mgmt_msg_head.status);
- return -EINVAL;
+ PMD_DRV_LOG(ERR, "Get interrupt config failed, err: %d, status: 0x%x, out size: 0x%x",
+ err, msix_cfg.mgmt_msg_head.status, out_size);
+ return -EIO;
}
interrupt_info->lli_credit_limit = msix_cfg.lli_credit_cnt;
* @hwdev: the hardware interface of a nic device
* @interrupt_info: Information of Interrupt aggregation
* Return: 0 on success, negative error value otherwise.
- **/
+ */
int hinic_set_interrupt_cfg(struct hinic_hwdev *hwdev,
struct nic_interrupt_info interrupt_info)
{
u16 out_size = sizeof(msix_cfg);
int err;
- memset(&msix_cfg, 0, sizeof(msix_cfg));
- msix_cfg.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
- msix_cfg.func_id = hinic_global_func_id(hwdev);
- msix_cfg.msix_index = (u16)interrupt_info.msix_index;
-
temp_info.msix_index = interrupt_info.msix_index;
-
err = hinic_get_interrupt_cfg(hwdev, &temp_info);
if (err)
- return -EINVAL;
+ return -EIO;
+ memset(&msix_cfg, 0, sizeof(msix_cfg));
+ msix_cfg.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
+ msix_cfg.func_id = hinic_global_func_id(hwdev);
+ msix_cfg.msix_index = (u16)interrupt_info.msix_index;
msix_cfg.lli_credit_cnt = temp_info.lli_credit_limit;
msix_cfg.lli_tmier_cnt = temp_info.lli_timer_cfg;
msix_cfg.pending_cnt = temp_info.pending_limt;
&msix_cfg, sizeof(msix_cfg),
&msix_cfg, &out_size, 0);
if (err || !out_size || msix_cfg.mgmt_msg_head.status) {
- PMD_DRV_LOG(ERR, "Set interrupt config failed, ret: %d",
- msix_cfg.mgmt_msg_head.status);
- return -EINVAL;
+ PMD_DRV_LOG(ERR, "Set interrupt config failed, err: %d, status: 0x%x, out size: 0x%x",
+ err, msix_cfg.mgmt_msg_head.status, out_size);
+ return -EIO;
}
return 0;
* @return
* 0 on success,
* negative error value otherwise.
- **/
+ */
int init_aeqs_msix_attr(void *hwdev)
{
struct hinic_hwdev *nic_hwdev = hwdev;
* @ph: PCIE TLP Processing Hint field
* @no_snooping: PCIE TLP No snooping
* @tph_en: PCIE TLP Processing Hint Enable
- **/
+ */
static void set_pf_dma_attr_entry(struct hinic_hwdev *hwdev, u32 entry_idx,
u8 st, u8 at, u8 ph,
enum hinic_pcie_nosnoop no_snooping,
hinic_hwif_write_reg(hwdev->hwif, addr, val);
}
+static int set_vf_dma_attr_entry(struct hinic_hwdev *hwdev, u8 entry_idx,
+ u8 st, u8 at, u8 ph,
+ enum hinic_pcie_nosnoop no_snooping,
+ enum hinic_pcie_tph tph_en)
+{
+ struct hinic_vf_dma_attr_table attr;
+ u16 out_size = sizeof(attr);
+ int err;
+
+ memset(&attr, 0, sizeof(attr));
+ attr.func_idx = hinic_global_func_id(hwdev);
+ attr.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
+ attr.func_dma_entry_num = hinic_dma_attr_entry_num(hwdev);
+ attr.entry_idx = entry_idx;
+ attr.st = st;
+ attr.at = at;
+ attr.ph = ph;
+ attr.no_snooping = no_snooping;
+ attr.tph_en = tph_en;
+
+ err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
+ HINIC_MGMT_CMD_DMA_ATTR_SET,
+ &attr, sizeof(attr), &attr, &out_size, 0);
+ if (err || !out_size || attr.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Set dma attribute failed, err: %d, status: 0x%x, out_size: 0x%x",
+ err, attr.mgmt_msg_head.status, out_size);
+ return -EIO;
+ }
+
+ return 0;
+}
+
/**
* dma_attr_table_init - initialize the the default dma attributes
* @hwdev: the pointer to the private hardware device object
- **/
-static void dma_attr_table_init(struct hinic_hwdev *hwdev)
+ */
+static int dma_attr_table_init(struct hinic_hwdev *hwdev)
{
+ int err = 0;
+
if (HINIC_IS_VF(hwdev))
- return;
+ err = set_vf_dma_attr_entry(hwdev, PCIE_MSIX_ATTR_ENTRY,
+ HINIC_PCIE_ST_DISABLE, HINIC_PCIE_AT_DISABLE,
+ HINIC_PCIE_PH_DISABLE, HINIC_PCIE_SNOOP,
+ HINIC_PCIE_TPH_DISABLE);
+ else
+ set_pf_dma_attr_entry(hwdev, PCIE_MSIX_ATTR_ENTRY,
+ HINIC_PCIE_ST_DISABLE, HINIC_PCIE_AT_DISABLE,
+ HINIC_PCIE_PH_DISABLE, HINIC_PCIE_SNOOP,
+ HINIC_PCIE_TPH_DISABLE);
- set_pf_dma_attr_entry(hwdev, PCIE_MSIX_ATTR_ENTRY,
- HINIC_PCIE_ST_DISABLE,
- HINIC_PCIE_AT_DISABLE,
- HINIC_PCIE_PH_DISABLE,
- HINIC_PCIE_SNOOP,
- HINIC_PCIE_TPH_DISABLE);
+ return err;
}
+/**
+ * hinic_init_attr_table - init dma and aeq msix attribute table
+ * @hwdev: the pointer to the private hardware device object
+ */
int hinic_init_attr_table(struct hinic_hwdev *hwdev)
{
- dma_attr_table_init(hwdev);
+ int err;
- return init_aeqs_msix_attr(hwdev);
+ err = dma_attr_table_init(hwdev);
+ if (err) {
+ PMD_DRV_LOG(ERR, "Initialize dma attribute table failed, err: %d",
+ err);
+ return err;
+ }
+
+ err = init_aeqs_msix_attr(hwdev);
+ if (err) {
+ PMD_DRV_LOG(ERR, "Initialize aeqs msix attribute failed, err: %d",
+ err);
+ return err;
+ }
+
+ return 0;
}
#define FAULT_SHOW_STR_LEN 16
static int resources_state_set(struct hinic_hwdev *hwdev,
enum hinic_res_state state)
{
- struct hinic_hwif *hwif = hwdev->hwif;
struct hinic_cmd_set_res_state res_state;
+ u16 out_size = sizeof(res_state);
+ int err;
memset(&res_state, 0, sizeof(res_state));
res_state.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
- res_state.func_idx = HINIC_HWIF_GLOBAL_IDX(hwif);
+ res_state.func_idx = HINIC_HWIF_GLOBAL_IDX(hwdev->hwif);
res_state.state = state;
- return hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
+ err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
HINIC_MGMT_CMD_RES_STATE_SET,
- &res_state, sizeof(res_state), NULL, NULL, 0);
+ &res_state, sizeof(res_state),
+ &res_state, &out_size, 0);
+ if (err || !out_size || res_state.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Set resources state failed, err: %d, status: 0x%x, out_size: 0x%x",
+ err, res_state.mgmt_msg_head.status, out_size);
+ return -EIO;
+ }
+
+ return 0;
}
/**
* @return
* 0 on success,
* negative error value otherwise.
- **/
+ */
int hinic_activate_hwdev_state(struct hinic_hwdev *hwdev)
{
int rc = HINIC_OK;
if (!hwdev)
return -EINVAL;
- if (!HINIC_IS_VF(hwdev))
- hinic_set_pf_status(hwdev->hwif,
- HINIC_PF_STATUS_ACTIVE_FLAG);
+ hinic_set_pf_status(hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
rc = resources_state_set(hwdev, HINIC_RES_ACTIVE);
if (rc) {
* hinic_deactivate_hwdev_state - Deactivate host nic state and notify mgmt
* channel that host nic is not ready.
* @hwdev: the pointer to the private hardware device object
- **/
+ */
void hinic_deactivate_hwdev_state(struct hinic_hwdev *hwdev)
{
int rc = HINIC_OK;
if (rc)
PMD_DRV_LOG(ERR, "Deinit resources state failed");
- if (!HINIC_IS_VF(hwdev))
- hinic_set_pf_status(hwdev->hwif, HINIC_PF_STATUS_INIT);
+ hinic_set_pf_status(hwdev->hwif, HINIC_PF_STATUS_INIT);
}
int hinic_get_board_info(void *hwdev, struct hinic_board_info *info)
if (err || board_info.mgmt_msg_head.status || !out_size) {
PMD_DRV_LOG(ERR, "Failed to get board info, err: %d, status: 0x%x, out size: 0x%x",
err, board_info.mgmt_msg_head.status, out_size);
- return -EFAULT;
+ return -EIO;
}
memcpy(info, &board_info.info, sizeof(*info));
* @return
* 0 on success,
* negative error value otherwise.
- **/
+ */
int hinic_l2nic_reset(struct hinic_hwdev *hwdev)
{
struct hinic_hwif *hwif = hwdev->hwif;
struct hinic_l2nic_reset l2nic_reset;
+ u16 out_size = sizeof(l2nic_reset);
int err = 0;
err = hinic_set_vport_enable(hwdev, false);
err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_COMM,
HINIC_MGMT_CMD_L2NIC_RESET,
&l2nic_reset, sizeof(l2nic_reset),
- NULL, NULL, 0);
- if (err || l2nic_reset.mgmt_msg_head.status) {
- PMD_DRV_LOG(ERR, "Reset L2NIC resources failed");
- return -EFAULT;
+ &l2nic_reset, &out_size, 0);
+ if (err || !out_size || l2nic_reset.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Reset L2NIC resources failed, err: %d, status: 0x%x, out_size: 0x%x",
+ err, l2nic_reset.mgmt_msg_head.status, out_size);
+ return -EIO;
}
return 0;
watchdog_info->is_overflow, watchdog_info->stack_top,
watchdog_info->stack_bottom);
- PMD_DRV_LOG(ERR, "Mgmt pc: 0x%08x, lr: 0x%08x, cpsr:0x%08x",
+ PMD_DRV_LOG(ERR, "Mgmt pc: 0x%08x, lr: 0x%08x, cpsr: 0x%08x",
watchdog_info->pc, watchdog_info->lr, watchdog_info->cpsr);
PMD_DRV_LOG(ERR, "Mgmt register info");
ret = hinic_link_event_process(hwdev, rte_dev, status);
/* check if link has changed, notify callback */
if (ret == 0)
- _rte_eth_dev_callback_process(rte_dev,
- RTE_ETH_EVENT_INTR_LSC,
- NULL);
+ rte_eth_dev_callback_process(rte_dev,
+ RTE_ETH_EVENT_INTR_LSC,
+ NULL);
}
void hinic_l2nic_async_event_handle(struct hinic_hwdev *hwdev,
}
memcpy(tmp_vendor, info->vendor_name, sizeof(info->vendor_name));
- snprintf(tmp_str, (sizeof(tmp_str) - 1),
+ snprintf(tmp_str, sizeof(tmp_str),
"Vendor: %s, %s, %s, length: %um, max_speed: %uGbps",
tmp_vendor, info->sfp_type ? "SFP" : "QSFP", port_type,
info->cable_length, info->cable_max_speed);
if (info->port_type != LINK_PORT_COPPER)
- snprintf(tmp_str + strlen(tmp_str), (sizeof(tmp_str) - 1),
- "%s, Temperature: %u", tmp_str,
- info->cable_temp);
+ snprintf(tmp_str + strlen(tmp_str),
+ sizeof(tmp_str) - strlen(tmp_str),
+ ", Temperature: %u", info->cable_temp);
PMD_DRV_LOG(INFO, "Cable information: %s", tmp_str);
}