#include <rte_pci.h>
#include <rte_bus_pci.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_pci.h>
#include <rte_mbuf.h>
#include <rte_malloc.h>
#include <rte_memcpy.h>
/* Mezz card for Blade Server */
#define HINIC_DEV_ID_MEZZ_25GE 0x0210
-#define HINIC_DEV_ID_MEZZ_40GE 0x020D
#define HINIC_DEV_ID_MEZZ_100GE 0x0205
/* 2*25G and 2*100G card */
#define HINIC_MIN_RX_BUF_SIZE 1024
#define HINIC_MAX_UC_MAC_ADDRS 128
#define HINIC_MAX_MC_MAC_ADDRS 2048
+
+#define HINIC_DEFAULT_BURST_SIZE 32
+#define HINIC_DEFAULT_NB_QUEUES 1
+#define HINIC_DEFAULT_RING_SIZE 1024
+#define HINIC_MAX_LRO_SIZE 65536
+
/*
* vlan_id is a 12 bit number.
* The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
#define HINIC_VLAN_FILTER_EN (1U << 0)
-#define HINIC_MTU_TO_PKTLEN(mtu) \
- ((mtu) + ETH_HLEN + ETH_CRC_LEN)
-
-#define HINIC_PKTLEN_TO_MTU(pktlen) \
- ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
-
/* lro numer limit for one packet */
#define HINIC_LRO_WQE_NUM_DEFAULT 8
-/* Driver-specific log messages type */
-int hinic_logtype;
-
struct hinic_xstats_name_off {
char name[RTE_ETH_XSTATS_NAME_SIZE];
u32 offset;
{"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
{"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
{"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
+ {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)},
+ {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)},
};
#define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
* Interrupt handler triggered by NIC for handling
* specific event.
*
- * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
+ * @param: The address of parameter (struct rte_eth_dev *) registered before.
*/
static void hinic_dev_interrupt_handler(void *param)
{
struct rte_eth_dev *dev = param;
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
+ if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
nic_dev->proc_dev_name, dev->data->port_id);
return;
return -EINVAL;
}
+ if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
+ dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
+
/* mtu size is 256~9600 */
- if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
- dev->data->dev_conf.rxmode.max_rx_pkt_len >
- HINIC_MAX_JUMBO_FRAME_SIZE) {
+ if (HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) <
+ HINIC_MIN_FRAME_SIZE ||
+ HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) >
+ HINIC_MAX_JUMBO_FRAME_SIZE) {
PMD_DRV_LOG(ERR,
- "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
+ "Packet length out of range, get packet length:%d, "
"expect between %d and %d",
- dev->data->dev_conf.rxmode.max_rx_pkt_len,
+ HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu),
HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
return -EINVAL;
}
- nic_dev->mtu_size =
- HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
+ nic_dev->mtu_size = dev->data->dev_conf.rxmode.mtu;
/* rss template */
err = hinic_config_mq_mode(dev, TRUE);
return err;
}
- /* init vlan offoad */
+ /* init VLAN offload */
err = hinic_vlan_offload_set(dev,
- ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
+ RTE_ETH_VLAN_STRIP_MASK | RTE_ETH_VLAN_FILTER_MASK);
if (err) {
- PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
+ PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
(void)hinic_config_mq_mode(dev, FALSE);
return err;
}
- /*clear fdir filter flag in function table*/
+ /* clear fdir filter flag in function table */
hinic_free_fdir_filter(nic_dev);
return HINIC_OK;
}
nic_dev->rxqs[queue_idx] = rxq;
- /* alloc rx sq hw wqepage*/
- rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
+ /* alloc rx sq hw wqe page */
+ rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
if (rc) {
PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
queue_idx, dev->data->name, rq_depth);
rxq->q_depth = rq_depth;
rxq->buf_len = (u16)buf_size;
rxq->rx_free_thresh = rx_free_thresh;
+ rxq->socket_id = socket_id;
/* the last point cant do mbuf rearm in bulk */
rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
/* alloc rx_cqe and prepare rq_wqe */
rc = hinic_setup_rx_resources(rxq);
if (rc) {
- PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
+ PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s",
queue_idx, dev->data->name);
goto setup_rx_res_err;
}
nic_dev->txqs[queue_idx] = txq;
/* alloc tx sq hw wqepage */
- rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
+ rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
if (rc) {
PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
queue_idx, dev->data->name, sq_depth);
txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
sizeof(struct hinic_sq_bufdesc);
txq->cos = nic_dev->default_cos;
+ txq->socket_id = socket_id;
/* alloc software txinfo */
rc = hinic_setup_tx_resources(txq);
} else {
*speed_capa = 0;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
- *speed_capa |= ETH_LINK_SPEED_1G;
+ *speed_capa |= RTE_ETH_LINK_SPEED_1G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
- *speed_capa |= ETH_LINK_SPEED_10G;
+ *speed_capa |= RTE_ETH_LINK_SPEED_10G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
- *speed_capa |= ETH_LINK_SPEED_25G;
+ *speed_capa |= RTE_ETH_LINK_SPEED_25G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
- *speed_capa |= ETH_LINK_SPEED_40G;
+ *speed_capa |= RTE_ETH_LINK_SPEED_40G;
if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
- *speed_capa |= ETH_LINK_SPEED_100G;
+ *speed_capa |= RTE_ETH_LINK_SPEED_100G;
}
}
info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS;
info->min_mtu = HINIC_MIN_MTU_SIZE;
info->max_mtu = HINIC_MAX_MTU_SIZE;
+ info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
hinic_get_speed_capa(dev, &info->speed_capa);
info->rx_queue_offload_capa = 0;
- info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
- DEV_RX_OFFLOAD_IPV4_CKSUM |
- DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM |
- DEV_RX_OFFLOAD_VLAN_FILTER |
- DEV_RX_OFFLOAD_SCATTER |
- DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_TCP_LRO;
+ info->rx_offload_capa = RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
+ RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
+ RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
+ RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
+ RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
+ RTE_ETH_RX_OFFLOAD_SCATTER |
+ RTE_ETH_RX_OFFLOAD_TCP_LRO |
+ RTE_ETH_RX_OFFLOAD_RSS_HASH;
info->tx_queue_offload_capa = 0;
- info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
- DEV_TX_OFFLOAD_IPV4_CKSUM |
- DEV_TX_OFFLOAD_UDP_CKSUM |
- DEV_TX_OFFLOAD_TCP_CKSUM |
- DEV_TX_OFFLOAD_SCTP_CKSUM |
- DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
- DEV_TX_OFFLOAD_TCP_TSO |
- DEV_TX_OFFLOAD_MULTI_SEGS;
+ info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
+ RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
+ RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
+ RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
+ RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+ RTE_ETH_TX_OFFLOAD_TCP_TSO |
+ RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
+
+ info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
info->hash_key_size = HINIC_RSS_KEY_SIZE;
info->reta_size = HINIC_RSS_INDIR_SIZE;
info->rx_desc_lim = hinic_rx_desc_lim;
info->tx_desc_lim = hinic_tx_desc_lim;
+ /* Driver-preferred Rx/Tx parameters */
+ info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
+ info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
+ info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
+ info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
+ info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
+ info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
+
return 0;
}
err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
if (err) {
- PMD_DRV_LOG(ERR, "Failed to get fw version\n");
+ PMD_DRV_LOG(ERR, "Failed to get fw version");
return -EINVAL;
}
return 0;
}
-
static int hinic_rxtx_configure(struct rte_eth_dev *dev)
{
- int err;
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- bool lro_en;
+ int err;
/* rx configure, if rss enable, need to init default configuration */
err = hinic_rx_configure(dev);
goto set_rx_mode_fail;
}
- /* config lro */
- lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
- true : false;
-
- err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
- HINIC_LRO_WQE_NUM_DEFAULT);
- if (err) {
- PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
- lro_en ? "Enable" : "Disable", err);
- goto set_rx_mode_fail;
- }
-
return HINIC_OK;
set_rx_mode_fail:
u8 port_link_status = 0;
struct nic_port_info port_link_info;
struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
- uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
- ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
- ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
- ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
+ uint32_t port_speed[LINK_SPEED_MAX] = {RTE_ETH_SPEED_NUM_10M,
+ RTE_ETH_SPEED_NUM_100M, RTE_ETH_SPEED_NUM_1G,
+ RTE_ETH_SPEED_NUM_10G, RTE_ETH_SPEED_NUM_25G,
+ RTE_ETH_SPEED_NUM_40G, RTE_ETH_SPEED_NUM_100G};
rc = hinic_get_link_status(nic_hwdev, &port_link_status);
if (rc)
return rc;
if (!port_link_status) {
- link->link_status = ETH_LINK_DOWN;
+ link->link_status = RTE_ETH_LINK_DOWN;
link->link_speed = 0;
- link->link_duplex = ETH_LINK_HALF_DUPLEX;
- link->link_autoneg = ETH_LINK_FIXED;
+ link->link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
+ link->link_autoneg = RTE_ETH_LINK_FIXED;
return HINIC_OK;
}
/* Get link status information from hardware */
rc = hinic_priv_get_dev_link_status(nic_dev, &link);
if (rc != HINIC_OK) {
- link.link_speed = ETH_SPEED_NUM_NONE;
- link.link_duplex = ETH_LINK_FULL_DUPLEX;
+ link.link_speed = RTE_ETH_SPEED_NUM_NONE;
+ link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
PMD_DRV_LOG(ERR, "Get link status failed");
goto out;
}
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
int ret;
- ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
- if (ret) {
- PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
- nic_dev->proc_dev_name, dev->data->port_id);
- return ret;
- }
-
/* link status follow phy port status, up will open pma */
ret = hinic_set_port_enable(nic_dev->hwdev, true);
if (ret)
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
int ret;
- ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
- if (ret) {
- PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
- nic_dev->proc_dev_name, dev->data->port_id);
- return ret;
- }
-
/* link status follow phy port status, up will close pma */
ret = hinic_set_port_enable(nic_dev->hwdev, false);
if (ret)
/* init txq and rxq context */
rc = hinic_init_qp_ctxts(nic_dev->hwdev);
if (rc) {
- PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
+ PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s",
name);
goto init_qp_fail;
}
/* open physical port and start packet receiving */
rc = hinic_set_port_enable(nic_dev->hwdev, true);
if (rc) {
- PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
+ PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
name);
goto en_port_fail;
}
if (dev->data->dev_conf.intr_conf.lsc != 0)
(void)hinic_link_update(dev, 0);
- hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
+ rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status);
return 0;
/**
* DPDK callback to release the receive queue.
*
- * @param queue
- * Generic receive queue pointer.
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param qid
+ * Receive queue index.
*/
-static void hinic_rx_queue_release(void *queue)
+static void hinic_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
{
- struct hinic_rxq *rxq = queue;
+ struct hinic_rxq *rxq = dev->data->rx_queues[qid];
struct hinic_nic_dev *nic_dev;
if (!rxq) {
/**
* DPDK callback to release the transmit queue.
*
- * @param queue
- * Generic transmit queue pointer.
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param qid
+ * Transmit queue index.
*/
-static void hinic_tx_queue_release(void *queue)
+static void hinic_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
{
- struct hinic_txq *txq = queue;
+ struct hinic_txq *txq = dev->data->tx_queues[qid];
struct hinic_nic_dev *nic_dev;
if (!txq) {
* @param dev
* Pointer to Ethernet device structure.
*/
-static void hinic_dev_stop(struct rte_eth_dev *dev)
+static int hinic_dev_stop(struct rte_eth_dev *dev)
{
int rc;
char *name;
name = dev->data->name;
port_id = dev->data->port_id;
- if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
+ dev->data->dev_started = 0;
+
+ if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START,
+ &nic_dev->dev_status)) {
PMD_DRV_LOG(INFO, "Device %s already stopped", name);
- return;
+ return 0;
}
/* just stop phy port and vport */
rc = hinic_set_port_enable(nic_dev->hwdev, false);
if (rc)
- PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
+ PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
rc, name, port_id);
rc = hinic_set_vport_enable(nic_dev->hwdev, false);
if (rc)
- PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
+ PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d",
rc, name, port_id);
/* Clear recorded link status */
/* clean root context */
hinic_free_qp_ctxts(nic_dev->hwdev);
- hinic_free_fdir_filter(nic_dev);
+ hinic_destroy_fdir_filter(dev);
/* free mbuf */
hinic_free_all_rx_mbuf(dev);
hinic_free_all_tx_mbuf(dev);
+
+ return 0;
}
static void hinic_disable_interrupt(struct rte_eth_dev *dev)
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
int ret, retries = 0;
- hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
+ rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
/* disable msix interrupt in hardware */
hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
/* disable rte interrupt */
- ret = rte_intr_disable(&pci_dev->intr_handle);
+ ret = rte_intr_disable(pci_dev->intr_handle);
if (ret)
PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
do {
ret =
- rte_intr_callback_unregister(&pci_dev->intr_handle,
+ rte_intr_callback_unregister(pci_dev->intr_handle,
hinic_dev_interrupt_handler, dev);
if (ret >= 0) {
break;
if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
retries);
+
+ rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status);
}
static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
{
- u32 rx_mode_ctrl = nic_dev->rx_mode_status;
+ u32 rx_mode_ctrl;
+ int err;
+
+ err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
+ if (err)
+ return err;
+
+ rx_mode_ctrl = nic_dev->rx_mode_status;
if (enable)
rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
else
rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
- return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
+ err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
+
+ (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+ return err;
}
/**
return err;
}
+ dev->data->rx_mbuf_alloc_failed = 0;
+
/* rx queue stats */
q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
/* delete multicast mac addrs */
hinic_delete_mc_addr_list(nic_dev);
+
+ rte_free(nic_dev->mc_list);
+
}
static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
{
- int ret = 0;
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ int ret;
PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
- if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
- mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
- return -EINVAL;
- }
-
ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
if (ret) {
PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
return ret;
}
- /* update max frame size */
- dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
nic_dev->mtu_size = mtu;
return ret;
if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
return -EINVAL;
+ if (vlan_id == 0)
+ return 0;
+
func_id = hinic_global_func_id(nic_dev->hwdev);
if (enable) {
int err;
/* Enable or disable VLAN filter */
- if (mask & ETH_VLAN_FILTER_MASK) {
- on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
+ if (mask & RTE_ETH_VLAN_FILTER_MASK) {
+ on = (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) ?
TRUE : FALSE;
err = hinic_config_vlan_filter(nic_dev->hwdev, on);
if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
}
/* Enable or disable VLAN stripping */
- if (mask & ETH_VLAN_STRIP_MASK) {
- on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
+ if (mask & RTE_ETH_VLAN_STRIP_MASK) {
+ on = (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) ?
TRUE : FALSE;
err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
if (err) {
nic_dev->proc_dev_name, dev->data->port_id);
}
- if (mask & ETH_VLAN_EXTEND_MASK) {
- PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
- nic_dev->proc_dev_name, dev->data->port_id);
- return -ENOTSUP;
- }
-
return 0;
}
static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
bool enable)
{
- u32 rx_mode_ctrl = nic_dev->rx_mode_status;
+ u32 rx_mode_ctrl;
+ int err;
+
+ err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
+ if (err)
+ return err;
+
+ rx_mode_ctrl = nic_dev->rx_mode_status;
if (enable)
rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
else
rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
- return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
+ err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
+
+ (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+ return err;
}
/**
return rc;
}
+static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct nic_pause_config nic_pause;
+ int err;
+
+ memset(&nic_pause, 0, sizeof(nic_pause));
+
+ err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
+ if (err)
+ return err;
+
+ if (nic_dev->pause_set || !nic_pause.auto_neg) {
+ nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
+ nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
+ }
+
+ fc_conf->autoneg = nic_pause.auto_neg;
+
+ if (nic_pause.tx_pause && nic_pause.rx_pause)
+ fc_conf->mode = RTE_ETH_FC_FULL;
+ else if (nic_pause.tx_pause)
+ fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
+ else if (nic_pause.rx_pause)
+ fc_conf->mode = RTE_ETH_FC_RX_PAUSE;
+ else
+ fc_conf->mode = RTE_ETH_FC_NONE;
+
+ return 0;
+}
+
+static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct nic_pause_config nic_pause;
+ int err;
+
+ nic_pause.auto_neg = fc_conf->autoneg;
+
+ if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) ||
+ (fc_conf->mode & RTE_ETH_FC_TX_PAUSE))
+ nic_pause.tx_pause = true;
+ else
+ nic_pause.tx_pause = false;
+
+ if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) ||
+ (fc_conf->mode & RTE_ETH_FC_RX_PAUSE))
+ nic_pause.rx_pause = true;
+ else
+ nic_pause.rx_pause = false;
+
+ err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
+ if (err)
+ return err;
+
+ nic_dev->pause_set = true;
+ nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
+ nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
+ nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
+
+ PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
+ nic_pause.tx_pause ? "on" : "off",
+ nic_pause.rx_pause ? "on" : "off",
+ nic_pause.auto_neg ? "on" : "off");
+
+ return 0;
+}
+
/**
* DPDK callback to update the RSS hash key and RSS hash type.
*
struct nic_rss_type rss_type = {0};
int err = 0;
- if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
+ if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) {
PMD_DRV_LOG(WARNING, "RSS is not enabled");
return HINIC_OK;
}
if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
+ PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
rss_conf->rss_key_len);
return HINIC_ERROR;
}
}
}
- rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
- rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
- rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
- rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
- rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
- rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
- rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
- rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
+ rss_type.ipv4 = (rss_hf & (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4)) ? 1 : 0;
+ rss_type.tcp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
+ rss_type.ipv6 = (rss_hf & (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6)) ? 1 : 0;
+ rss_type.ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_EX) ? 1 : 0;
+ rss_type.tcp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
+ rss_type.tcp_ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
+ rss_type.udp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
+ rss_type.udp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
if (err) {
struct nic_rss_type rss_type = {0};
int err;
- if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
+ if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) {
PMD_DRV_LOG(WARNING, "RSS is not enabled");
return HINIC_ERROR;
}
rss_conf->rss_hf = 0;
rss_conf->rss_hf |= rss_type.ipv4 ?
- (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
- rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
+ (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4) : 0;
+ rss_conf->rss_hf |= rss_type.tcp_ipv4 ? RTE_ETH_RSS_NONFRAG_IPV4_TCP : 0;
rss_conf->rss_hf |= rss_type.ipv6 ?
- (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
- rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
- rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
- rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
- rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
- rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
+ (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6) : 0;
+ rss_conf->rss_hf |= rss_type.ipv6_ext ? RTE_ETH_RSS_IPV6_EX : 0;
+ rss_conf->rss_hf |= rss_type.tcp_ipv6 ? RTE_ETH_RSS_NONFRAG_IPV6_TCP : 0;
+ rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? RTE_ETH_RSS_IPV6_TCP_EX : 0;
+ rss_conf->rss_hf |= rss_type.udp_ipv4 ? RTE_ETH_RSS_NONFRAG_IPV4_UDP : 0;
+ rss_conf->rss_hf |= rss_type.udp_ipv6 ? RTE_ETH_RSS_NONFRAG_IPV6_UDP : 0;
return HINIC_OK;
}
/**
- * DPDK callback to update the RETA indirection table.
+ * DPDK callback to update the RSS redirection table.
*
* @param dev
* Pointer to Ethernet device structure.
* @param reta_conf
- * Pointer to RETA configuration structure array.
+ * Pointer to RSS reta configuration data.
* @param reta_size
* Size of the RETA table.
*
u16 i = 0;
u16 idx, shift;
- if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
+ if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG))
return HINIC_OK;
if (reta_size != NIC_RSS_INDIR_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
+ PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
return HINIC_ERROR;
}
/* update rss indir_tbl */
for (i = 0; i < reta_size; i++) {
- idx = i / RTE_RETA_GROUP_SIZE;
- shift = i % RTE_RETA_GROUP_SIZE;
- if (reta_conf[idx].mask & (1ULL << shift))
- indirtbl[i] = reta_conf[idx].reta[shift];
- }
+ idx = i / RTE_ETH_RETA_GROUP_SIZE;
+ shift = i % RTE_ETH_RETA_GROUP_SIZE;
- for (i = 0 ; i < reta_size; i++) {
- if (indirtbl[i] >= nic_dev->num_rq) {
- PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
- i, nic_dev->num_rq);
- goto disable_rss;
+ if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
+ PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
+ "exceeds the maximum rxq num: %d", i,
+ reta_conf[idx].reta[shift], nic_dev->num_rq);
+ return -EINVAL;
}
+
+ if (reta_conf[idx].mask & (1ULL << shift))
+ indirtbl[i] = reta_conf[idx].reta[shift];
}
err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
return HINIC_ERROR;
}
-
/**
- * DPDK callback to get the RETA indirection table.
+ * DPDK callback to get the RSS indirection table.
*
* @param dev
* Pointer to Ethernet device structure.
* @param reta_conf
- * Pointer to RETA configuration structure array.
+ * Pointer to RSS reta configuration data.
* @param reta_size
* Size of the RETA table.
*
u16 i = 0;
if (reta_size != NIC_RSS_INDIR_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
+ PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
return HINIC_ERROR;
}
err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
if (err) {
- PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
+ PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
err);
return err;
}
for (i = 0; i < reta_size; i++) {
- idx = i / RTE_RETA_GROUP_SIZE;
- shift = i % RTE_RETA_GROUP_SIZE;
+ idx = i / RTE_ETH_RETA_GROUP_SIZE;
+ shift = i % RTE_ETH_RETA_GROUP_SIZE;
if (reta_conf[idx].mask & (1ULL << shift))
reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
}
return count;
}
+static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_rxq_info *qinfo)
+{
+ struct hinic_rxq *rxq = dev->data->rx_queues[queue_id];
+
+ qinfo->mp = rxq->mb_pool;
+ qinfo->nb_desc = rxq->q_depth;
+}
+
+static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_txq_info *qinfo)
+{
+ struct hinic_txq *txq = dev->data->tx_queues[queue_id];
+
+ qinfo->nb_desc = txq->q_depth;
+}
+
/**
* DPDK callback to retrieve names of extended device statistics
*
for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
snprintf(xstats_names[count].name,
sizeof(xstats_names[count].name),
- "%s",
- hinic_vport_stats_strings[i].name);
+ "%s", hinic_vport_stats_strings[i].name);
count++;
}
for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
snprintf(xstats_names[count].name,
sizeof(xstats_names[count].name),
- "%s",
- hinic_phyport_stats_strings[i].name);
+ "%s", hinic_phyport_stats_strings[i].name);
count++;
}
return count;
}
+
/**
* DPDK callback to set mac address
*
rte_ether_addr_copy(addr, &nic_dev->default_addr);
- PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
- addr->addr_bytes[0], addr->addr_bytes[1],
- addr->addr_bytes[2], addr->addr_bytes[3],
- addr->addr_bytes[4], addr->addr_bytes[5]);
+ PMD_DRV_LOG(INFO, "Set new mac address " RTE_ETHER_ADDR_PRT_FMT,
+ RTE_ETHER_ADDR_BYTES(addr));
return 0;
}
* @param dev
* Pointer to Ethernet device structure.
* @param index
- * MAC address index.
+ * MAC address index, should less than 128.
*/
static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
{
* @param dev
* Pointer to Ethernet device structure.
* @param mac_addr
- * MAC address to register.
+ * Pointer to MAC address
* @param index
- * MAC address index.
+ * MAC address index, should less than 128.
* @param vmdq
- * VMDq pool index to associate address with (ignored).
+ * VMDq pool index(not used).
*
* @return
- * 0 on success, a negative errno value otherwise and rte_errno is set.
+ * 0 on success, negative error value otherwise.
*/
-
static int hinic_mac_addr_add(struct rte_eth_dev *dev,
struct rte_ether_addr *mac_addr, uint32_t index,
__rte_unused uint32_t vmdq)
int ret;
if (index >= HINIC_MAX_UC_MAC_ADDRS) {
- PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
+ PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
return -EINVAL;
}
}
/**
- * DPDK callback to manage filter operations
+ * DPDK callback to get flow operations
*
* @param dev
* Pointer to Ethernet device structure.
- * @param filter_type
- * Filter type.
- * @param filter_op
- * Operation to perform.
- * @param arg
+ * @param ops
* Pointer to operation-specific structure.
*
* @return
- * 0 on success, negative errno value on failure.
+ * 0 on success, negative error value otherwise.
*/
-static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
- enum rte_filter_type filter_type,
- enum rte_filter_op filter_op,
- void *arg)
+static int hinic_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
+ const struct rte_flow_ops **ops)
{
- struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- int func_id = hinic_global_func_id(nic_dev->hwdev);
-
- switch (filter_type) {
- case RTE_ETH_FILTER_GENERIC:
- if (filter_op != RTE_ETH_FILTER_GET)
- return -EINVAL;
- *(const void **)arg = &hinic_flow_ops;
- break;
- default:
- PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
- filter_type);
- return -EINVAL;
- }
-
- PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
- "filter_op: 0x%x.", func_id, filter_type, filter_op);
+ *ops = &hinic_flow_ops;
return 0;
}
static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
{
struct nic_pause_config pause_config = {0};
+ int err;
pause_config.auto_neg = 0;
pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
- return hinic_set_pause_config(nic_dev->hwdev, pause_config);
+ err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
+ if (err)
+ return err;
+
+ nic_dev->pause_set = true;
+ nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
+ nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
+ nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
+
+ return 0;
}
static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
up_pgid, up_bw, up_strict);
}
+static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
+{
+ u8 default_cos = 0;
+ u8 valid_cos_bitmap;
+ u8 i;
+
+ valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
+ if (!valid_cos_bitmap) {
+ PMD_DRV_LOG(ERR, "PF has none cos to support\n");
+ return -EFAULT;
+ }
+
+ for (i = 0; i < NR_MAX_COS; i++) {
+ if (valid_cos_bitmap & BIT(i))
+ default_cos = i; /* Find max cos id as default cos */
+ }
+
+ *cos_id = default_cos;
+
+ return 0;
+}
+
static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
{
u8 cos_id = 0;
int err;
if (!HINIC_IS_VF(nic_dev->hwdev)) {
- nic_dev->default_cos =
- (hinic_global_func_id(nic_dev->hwdev) +
- DEFAULT_BASE_COS) % NR_MAX_COS;
+ err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
+ if (err) {
+ PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
+ err);
+ return HINIC_ERROR;
+ }
} else {
err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
if (err) {
PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
- err);
+ err);
return HINIC_ERROR;
}
-
- nic_dev->default_cos = cos_id;
}
+ nic_dev->default_cos = cos_id;
+
+ PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
+
return 0;
}
}
/* get nic capability */
- if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
+ if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) {
+ PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s",
+ eth_dev->data->name);
+ rc = -EINVAL;
goto nic_check_fail;
+ }
/* init root cla and function table */
rc = hinic_init_nicio(nic_dev->hwdev);
* @param dev
* Pointer to Ethernet device structure.
*/
-static void hinic_dev_close(struct rte_eth_dev *dev)
+static int hinic_dev_close(struct rte_eth_dev *dev)
{
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ int ret;
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
- if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
+ if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE,
+ &nic_dev->dev_status)) {
PMD_DRV_LOG(WARNING, "Device %s already closed",
dev->data->name);
- return;
+ return 0;
}
/* stop device first */
- hinic_dev_stop(dev);
+ ret = hinic_dev_stop(dev);
/* rx_cqe, rx_info */
hinic_free_all_rx_resources(dev);
/* disable hardware and uio interrupt */
hinic_disable_interrupt(dev);
+ /* destroy rx mode mutex */
+ hinic_mutex_destroy(&nic_dev->rx_mode_mutex);
+
/* deinit nic hardware device */
hinic_nic_dev_destroy(dev);
+
+ return ret;
}
static const struct eth_dev_ops hinic_pmd_ops = {
.allmulticast_disable = hinic_dev_allmulticast_disable,
.promiscuous_enable = hinic_dev_promiscuous_enable,
.promiscuous_disable = hinic_dev_promiscuous_disable,
+ .flow_ctrl_get = hinic_flow_ctrl_get,
+ .flow_ctrl_set = hinic_flow_ctrl_set,
.rss_hash_update = hinic_rss_hash_update,
.rss_hash_conf_get = hinic_rss_conf_get,
.reta_update = hinic_rss_indirtbl_update,
.xstats_get = hinic_dev_xstats_get,
.xstats_reset = hinic_dev_xstats_reset,
.xstats_get_names = hinic_dev_xstats_get_names,
+ .rxq_info_get = hinic_rxq_info_get,
+ .txq_info_get = hinic_txq_info_get,
.mac_addr_set = hinic_set_mac_addr,
.mac_addr_remove = hinic_mac_addr_remove,
.mac_addr_add = hinic_mac_addr_add,
.set_mc_addr_list = hinic_set_mc_addr_list,
- .filter_ctrl = hinic_dev_filter_ctrl,
+ .flow_ops_get = hinic_dev_flow_ops_get,
};
static const struct eth_dev_ops hinic_pmd_vf_ops = {
.xstats_get = hinic_dev_xstats_get,
.xstats_reset = hinic_dev_xstats_reset,
.xstats_get_names = hinic_dev_xstats_get_names,
+ .rxq_info_get = hinic_rxq_info_get,
+ .txq_info_get = hinic_txq_info_get,
.mac_addr_set = hinic_set_mac_addr,
.mac_addr_remove = hinic_mac_addr_remove,
.mac_addr_add = hinic_mac_addr_add,
.set_mc_addr_list = hinic_set_mc_addr_list,
- .filter_ctrl = hinic_dev_filter_ctrl,
+ .flow_ops_get = hinic_dev_flow_ops_get,
+};
+
+static const struct eth_dev_ops hinic_dev_sec_ops = {
+ .dev_infos_get = hinic_dev_infos_get,
};
static int hinic_func_init(struct rte_eth_dev *eth_dev)
struct rte_ether_addr *eth_addr;
struct hinic_nic_dev *nic_dev;
struct hinic_filter_info *filter_info;
+ struct hinic_tcam_info *tcam_info;
u32 mac_size;
int rc;
/* EAL is SECONDARY and eth_dev is already created */
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- rc = rte_intr_callback_register(&pci_dev->intr_handle,
- hinic_dev_interrupt_handler,
- (void *)eth_dev);
- if (rc)
- PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
- eth_dev->data->name);
+ eth_dev->dev_ops = &hinic_dev_sec_ops;
+ PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
+ eth_dev->data->name);
- return rc;
+ return 0;
}
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
+
nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
memset(nic_dev, 0, sizeof(*nic_dev));
goto mc_addr_fail;
}
- /*
- * Pass the information to the rte_eth_dev_close() that it should also
- * release the private port resources.
- */
- eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
-
/* create hardware nic_device */
rc = hinic_nic_dev_create(eth_dev);
if (rc) {
}
/* register callback func to eal lib */
- rc = rte_intr_callback_register(&pci_dev->intr_handle,
+ rc = rte_intr_callback_register(pci_dev->intr_handle,
hinic_dev_interrupt_handler,
(void *)eth_dev);
if (rc) {
}
/* enable uio/vfio intr/eventfd mapping */
- rc = rte_intr_enable(&pci_dev->intr_handle);
+ rc = rte_intr_enable(pci_dev->intr_handle);
if (rc) {
PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
eth_dev->data->name);
goto enable_intr_fail;
}
- hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
+ rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
+
+ hinic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
/* initialize filter info */
filter_info = &nic_dev->filter;
+ tcam_info = &nic_dev->tcam;
memset(filter_info, 0, sizeof(struct hinic_filter_info));
+ memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
/* initialize 5tuple filter list */
TAILQ_INIT(&filter_info->fivetuple_list);
+ TAILQ_INIT(&tcam_info->tcam_list);
TAILQ_INIT(&nic_dev->filter_ntuple_list);
TAILQ_INIT(&nic_dev->filter_ethertype_list);
TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
TAILQ_INIT(&nic_dev->hinic_flow_list);
- hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
+ rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status);
PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
eth_dev->data->name);
return 0;
enable_intr_fail:
- (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
+ (void)rte_intr_callback_unregister(pci_dev->intr_handle,
hinic_dev_interrupt_handler,
(void *)eth_dev);
static int hinic_dev_uninit(struct rte_eth_dev *dev)
{
- struct hinic_nic_dev *nic_dev;
-
- nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
-
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
hinic_dev_close(dev);
- dev->dev_ops = NULL;
- dev->rx_pkt_burst = NULL;
- dev->tx_pkt_burst = NULL;
-
- rte_free(nic_dev->mc_list);
-
- rte_free(dev->data->mac_addrs);
- dev->data->mac_addrs = NULL;
-
return HINIC_OK;
}
static struct rte_pci_id pci_id_hinic_map[] = {
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
- { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
-
-RTE_INIT(hinic_init_log)
-{
- hinic_logtype = rte_log_register("pmd.net.hinic");
- if (hinic_logtype >= 0)
- rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
-}
+RTE_LOG_REGISTER_DEFAULT(hinic_logtype, INFO);