HNS3_OPC_QUERY_DEV_SPECS = 0x0050,
+ HNS3_OPC_SSU_DROP_REG = 0x0065,
+
/* MAC command */
HNS3_OPC_CONFIG_MAC_MODE = 0x0301,
HNS3_OPC_QUERY_LINK_STATUS = 0x0307,
HNS3_OPC_CONFIG_MAX_FRM_SIZE = 0x0308,
HNS3_OPC_CONFIG_SPEED_DUP = 0x0309,
+ HNS3_OPC_QUERY_MAC_TNL_INT = 0x0310,
+ HNS3_OPC_MAC_TNL_INT_EN = 0x0311,
+ HNS3_OPC_CLEAR_MAC_TNL_INT = 0x0312,
HNS3_OPC_CONFIG_FEC_MODE = 0x031A,
/* PFC/Pause commands */
HNS3_CAPS_TQP_TXRX_INDEP_B,
HNS3_CAPS_HW_PAD_B,
HNS3_CAPS_STASH_B,
+ HNS3_CAPS_UDP_TUNNEL_CSUM_B,
+ HNS3_CAPS_RAS_IMP_B,
+ HNS3_CAPS_FEC_B,
+ HNS3_CAPS_PAUSE_B,
+ HNS3_CAPS_RXD_ADV_LAYOUT_B,
};
enum HNS3_API_CAP_BITS {
#define HNS3_CFG_RESET_MAC_B 3
#define HNS3_CFG_RESET_FUNC_B 7
+#define HNS3_CFG_RESET_RCB_B 1
struct hns3_reset_cmd {
uint8_t mac_func_reset;
uint8_t fun_reset_vfid;
- uint8_t rsv[22];
+ uint8_t fun_reset_rcb;
+ uint8_t rsv1;
+ uint16_t fun_reset_rcb_vqid_start;
+ uint16_t fun_reset_rcb_vqid_num;
+ uint8_t fun_reset_rcb_return_status;
+ uint8_t rsv2[15];
};
#define HNS3_QUERY_DEV_SPECS_BD_NUM 4
uint32_t rsv2[2];
};
+#define HNS3_OPC_SSU_DROP_REG_NUM 2
+
+struct hns3_query_ssu_cmd {
+ uint8_t rxtx;
+ uint8_t rsv[3];
+ uint32_t full_drop_cnt;
+ uint32_t part_drop_cnt;
+ uint32_t oq_drop_cnt;
+ uint32_t rev1[2];
+};
+
#define HNS3_MAX_TQP_NUM_HIP08_PF 64
#define HNS3_DEFAULT_TX_BUF 0x4000 /* 16k bytes */
#define HNS3_TOTAL_PKT_BUF 0x108000 /* 1.03125M bytes */