net/sfc: use own logging helper macros

[dpdk.git] / drivers / net / hns3 / hns3_dcb.c

diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 369a40e..c1be49e 100644 (file)
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -19,7 +19,6 @@
 #define HNS3_SHAPER_BS_U_DEF   5
 #define HNS3_SHAPER_BS_S_DEF   20
 #define BW_MAX_PERCENT         100
-#define HNS3_ETHER_MAX_RATE    100000
 
 /*
  * hns3_shaper_para_calc: calculate ir parameter for the shaper
@@ -580,7 +579,9 @@ hns3_dcb_pri_shaper_cfg(struct hns3_hw *hw)
 void
 hns3_set_rss_size(struct hns3_hw *hw, uint16_t nb_rx_q)
 {
+       struct hns3_rss_conf *rss_cfg = &hw->rss_info;
        uint16_t rx_qnum_per_tc;
+       int i;
 
        rx_qnum_per_tc = nb_rx_q / hw->num_tc;
        rx_qnum_per_tc = RTE_MIN(hw->rss_size_max, rx_qnum_per_tc);
@@ -590,6 +591,19 @@ hns3_set_rss_size(struct hns3_hw *hw, uint16_t nb_rx_q)
                hw->alloc_rss_size = rx_qnum_per_tc;
        }
        hw->used_rx_queues = hw->num_tc * hw->alloc_rss_size;
+
+       /*
+        * When rss size is changed, we need to update rss redirection table
+        * maintained by driver. Besides, during the entire reset process, we
+        * need to ensure that the rss table information are not overwritten
+        * and configured directly to the hardware in the RESET_STAGE_RESTORE
+        * stage of the reset process.
+        */
+       if (rte_atomic16_read(&hw->reset.resetting) == 0) {
+               for (i = 0; i < HNS3_RSS_IND_TBL_SIZE; i++)
+                       rss_cfg->rss_indirection_tbl[i] =
+                                                       i % hw->alloc_rss_size;
+       }
 }
 
 void
@@ -734,12 +748,10 @@ hns3_dcb_schd_mode_cfg(struct hns3_hw *hw)
        }
 
        ret = hns3_dcb_lvl34_schd_mode_cfg(hw);
-       if (ret) {
+       if (ret)
                hns3_err(hw, "config lvl34_schd_mode failed: %d", ret);
-               return ret;
-       }
 
-       return 0;
+       return ret;
 }
 
 static int
@@ -755,13 +767,16 @@ hns3_dcb_pri_tc_base_dwrr_cfg(struct hns3_hw *hw)
 
                ret = hns3_dcb_pri_weight_cfg(hw, i, dwrr);
                if (ret) {
-                       hns3_err(hw, "fail to send priority weight cmd: %d", i);
+                       hns3_err(hw,
+                              "fail to send priority weight cmd: %d, ret = %d",
+                              i, ret);
                        return ret;
                }
 
                ret = hns3_dcb_qs_weight_cfg(hw, i, BW_MAX_PERCENT);
                if (ret) {
-                       hns3_err(hw, "fail to send qs_weight cmd: %d", i);
+                       hns3_err(hw, "fail to send qs_weight cmd: %d, ret = %d",
+                                i, ret);
                        return ret;
                }
        }
@@ -774,6 +789,7 @@ hns3_dcb_pri_dwrr_cfg(struct hns3_hw *hw)
 {
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_pf *pf = &hns->pf;
+       uint32_t version;
        int ret;
 
        if (pf->tx_sch_mode != HNS3_FLAG_TC_BASE_SCH_MODE)
@@ -788,8 +804,17 @@ hns3_dcb_pri_dwrr_cfg(struct hns3_hw *hw)
 
        ret = hns3_dcb_ets_tc_dwrr_cfg(hw);
        if (ret == -EOPNOTSUPP) {
-               hns3_warn(hw, "fw %08x does't support ets tc weight cmd",
-                         hw->fw_version);
+               version = hw->fw_version;
+               hns3_warn(hw,
+                         "fw %lu.%lu.%lu.%lu doesn't support ets tc weight cmd",
+                         hns3_get_field(version, HNS3_FW_VERSION_BYTE3_M,
+                                        HNS3_FW_VERSION_BYTE3_S),
+                         hns3_get_field(version, HNS3_FW_VERSION_BYTE2_M,
+                                        HNS3_FW_VERSION_BYTE2_S),
+                         hns3_get_field(version, HNS3_FW_VERSION_BYTE1_M,
+                                        HNS3_FW_VERSION_BYTE1_S),
+                         hns3_get_field(version, HNS3_FW_VERSION_BYTE0_M,
+                                        HNS3_FW_VERSION_BYTE0_S));
                ret = 0;
        }
 
@@ -830,12 +855,10 @@ hns3_dcb_dwrr_cfg(struct hns3_hw *hw)
        }
 
        ret = hns3_dcb_pri_dwrr_cfg(hw);
-       if (ret) {
+       if (ret)
                hns3_err(hw, "config pri_dwrr failed: %d", ret);
-               return ret;
-       }
 
-       return 0;
+       return ret;
 }
 
 static int
@@ -917,12 +940,10 @@ hns3_pri_q_qs_cfg(struct hns3_hw *hw)
 
        /* Cfg q -> qs mapping */
        ret = hns3_q_to_qs_map(hw);
-       if (ret) {
+       if (ret)
                hns3_err(hw, "nq_to_qs mapping fail: %d", ret);
-               return ret;
-       }
 
-       return 0;
+       return ret;
 }
 
 static int
@@ -1537,12 +1558,10 @@ hns3_update_queue_map_configure(struct hns3_adapter *hns)
 
        hns3_dcb_update_tc_queue_mapping(hw, nb_rx_q, nb_tx_q);
        ret = hns3_q_to_qs_map(hw);
-       if (ret) {
+       if (ret)
                hns3_err(hw, "failed to map nq to qs! ret = %d", ret);
-               return ret;
-       }
 
-       return 0;
+       return ret;
 }
 
 int
@@ -1554,10 +1573,8 @@ hns3_dcb_cfg_update(struct hns3_adapter *hns)
 
        if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) {
                ret = hns3_dcb_configure(hns);
-               if (ret) {
+               if (ret)
                        hns3_err(hw, "Failed to config dcb: %d", ret);
-                       return ret;
-               }
        } else {
                /*
                 * Update queue map without PFC configuration,