#ifndef _HNS3_DCB_H_
#define _HNS3_DCB_H_
+#define HNS3_ETHER_MAX_RATE 100000
+
/* MAC Pause */
#define HNS3_TX_MAC_PAUSE_EN_MSK BIT(0)
#define HNS3_RX_MAC_PAUSE_EN_MSK BIT(1)
int
hns3_dcb_pfc_enable(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf);
-void hns3_tc_queue_mapping_cfg(struct hns3_hw *hw);
+void hns3_set_rss_size(struct hns3_hw *hw, uint16_t nb_rx_q);
+
+void hns3_tc_queue_mapping_cfg(struct hns3_hw *hw, uint16_t nb_queue);
int hns3_dcb_cfg_update(struct hns3_adapter *hns);