#include "hns3_dcb.h"
#include "hns3_mp.h"
-#define HNS3_DEFAULT_PORT_CONF_BURST_SIZE 32
-#define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM 1
-
#define HNS3_SERVICE_INTERVAL 1000000 /* us */
#define HNS3_SERVICE_QUICK_INTERVAL 10
#define HNS3_INVALID_PVID 0xFFFF
uint32_t status;
int ret;
- /* query and clear mac tnl interruptions */
+ /* query and clear mac tnl interrupt */
hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_MAC_TNL_INT, true);
ret = hns3_cmd_send(hw, &desc, 1);
if (ret) {
* When port base vlan enabled, we use port base vlan as the vlan
* filter condition. In this case, we don't update vlan filter table
* when user add new vlan or remove exist vlan, just update the
- * vlan list. The vlan id in vlan list will be writen in vlan filter
+ * vlan list. The vlan id in vlan list will be written in vlan filter
* table until port base vlan disabled
*/
if (hw->port_base_vlan_cfg.state == HNS3_PORT_BASE_VLAN_DISABLE) {
.offloads = 0,
};
- info->vmdq_queue_num = 0;
-
info->reta_size = hw->rss_ind_tbl_size;
info->hash_key_size = HNS3_RSS_KEY_SIZE;
info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
case ETH_SPEED_NUM_50G:
case ETH_SPEED_NUM_100G:
case ETH_SPEED_NUM_200G:
- new_link->link_speed = mac->link_speed;
+ if (mac->link_status)
+ new_link->link_speed = mac->link_speed;
break;
default:
if (mac->link_status)
new_link->link_speed = ETH_SPEED_NUM_UNKNOWN;
- else
- new_link->link_speed = ETH_SPEED_NUM_NONE;
break;
}
+ if (!mac->link_status)
+ new_link->link_speed = ETH_SPEED_NUM_NONE;
+
new_link->link_duplex = mac->link_duplex;
new_link->link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
new_link->link_autoneg = mac->link_autoneg;
struct rte_eth_link new_link;
int ret;
+ /* When port is stopped, report link down. */
+ if (eth_dev->data->dev_started == 0) {
+ new_link.link_autoneg = mac->link_autoneg;
+ new_link.link_duplex = mac->link_duplex;
+ new_link.link_speed = ETH_SPEED_NUM_NONE;
+ new_link.link_status = ETH_LINK_DOWN;
+ goto out;
+ }
+
do {
ret = hns3_update_port_link_info(eth_dev);
if (ret) {
memset(&new_link, 0, sizeof(new_link));
hns3_setup_linkstatus(eth_dev, &new_link);
+out:
return rte_eth_linkstatus_set(eth_dev, &new_link);
}
req = (struct hns3_cfg_param_cmd *)desc[0].data;
/* get the configuration */
- cfg->vmdq_vport_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
- HNS3_CFG_VMDQ_M, HNS3_CFG_VMDQ_S);
cfg->tc_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
HNS3_CFG_TC_NUM_M, HNS3_CFG_TC_NUM_S);
cfg->tqp_desc_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
* For different application scenes, the enabled port number, TC number
* and no_drop TC number are different. In order to obtain the better
* performance, software could allocate the buffer size and configure
- * the waterline by tring to decrease the private buffer size according
- * to the order, namely, waterline of valided tc, pfc disabled tc, pfc
+ * the waterline by trying to decrease the private buffer size according
+ * to the order, namely, waterline of valid tc, pfc disabled tc, pfc
* enabled tc.
*/
if (hns3_rx_buf_calc_all(hw, false, buf_alloc))
if (state != hw->mac.link_status) {
hw->mac.link_status = state;
hns3_warn(hw, "Link status change to %s!", state ? "up" : "down");
- hns3_config_mac_tnl_int(hw,
- state == ETH_LINK_UP ? true : false);
return true;
}
* and belong to a different type from the MSI-x errors processed
* by the network driver.
*
- * Network driver should open the new error report on initialition
+ * Network driver should open the new error report on initialization.
*/
val = hns3_read_dev(hw, HNS3_VECTOR0_OTER_EN_REG);
hns3_set_bit(val, HNS3_VECTOR0_ALL_MSIX_ERR_B, enable ? 1 : 0);
ret = hns3_apply_link_speed(hw);
if (ret)
- goto err_config_mac_mode;
+ goto err_set_link_speed;
return 0;
-err_config_mac_mode:
+err_set_link_speed:
(void)hns3_cfg_mac_mode(hw, false);
+
+err_config_mac_mode:
hns3_dev_release_mbufs(hns);
/*
* Here is exception handling, hns3_reset_all_tqps will have the
if (wait_data->result == HNS3_WAIT_SUCCESS)
return 0;
else if (wait_data->result == HNS3_WAIT_TIMEOUT) {
- gettimeofday(&tv, NULL);
+ hns3_clock_gettime(&tv);
hns3_warn(hw, "Reset step4 hardware not ready after reset time=%ld.%.6ld",
tv.tv_sec, tv.tv_usec);
return -ETIME;
wait_data->hns = hns;
wait_data->check_completion = is_pf_reset_done;
wait_data->end_ms = (uint64_t)HNS3_RESET_WAIT_CNT *
- HNS3_RESET_WAIT_MS + get_timeofday_ms();
+ HNS3_RESET_WAIT_MS + hns3_clock_gettime_ms();
wait_data->interval = HNS3_RESET_WAIT_MS * USEC_PER_MSEC;
wait_data->count = HNS3_RESET_WAIT_CNT;
wait_data->result = HNS3_WAIT_REQUEST;
struct timeval tv;
uint32_t val;
- gettimeofday(&tv, NULL);
+ hns3_clock_gettime(&tv);
if (hns3_read_dev(hw, HNS3_GLOBAL_RESET_REG) ||
hns3_read_dev(hw, HNS3_FUN_RST_ING)) {
hns3_warn(hw, "Don't process msix during resetting time=%ld.%.6ld",
*/
reset_level = hns3_get_reset_level(hns, &hw->reset.pending);
if (reset_level != HNS3_NONE_RESET) {
- gettimeofday(&tv_start, NULL);
+ hns3_clock_gettime(&tv_start);
ret = hns3_reset_process(hns, reset_level);
- gettimeofday(&tv, NULL);
+ hns3_clock_gettime(&tv);
timersub(&tv, &tv_start, &tv_delta);
- msec = tv_delta.tv_sec * MSEC_PER_SEC +
- tv_delta.tv_usec / USEC_PER_MSEC;
+ msec = hns3_clock_calctime_ms(&tv_delta);
if (msec > HNS3_RESET_PROCESS_MS)
- hns3_err(hw, "%d handle long time delta %" PRIx64
+ hns3_err(hw, "%d handle long time delta %" PRIu64
" ms time=%ld.%.6ld",
hw->reset.level, msec,
tv.tv_sec, tv.tv_usec);
return ret;
/* HNS3 PMD driver only support one bit set mode, e.g. 0x1, 0x4 */
- if (!is_fec_mode_one_bit_set(mode))
- hns3_err(hw, "FEC mode(0x%x) not supported in HNS3 PMD,"
+ if (!is_fec_mode_one_bit_set(mode)) {
+ hns3_err(hw, "FEC mode(0x%x) not supported in HNS3 PMD, "
"FEC mode should be only one bit set", mode);
+ return -EINVAL;
+ }
/*
* Check whether the configured mode is within the FEC capability.
return 0;
}
+void
+hns3_clock_gettime(struct timeval *tv)
+{
+#ifdef CLOCK_MONOTONIC_RAW /* Defined in glibc bits/time.h */
+#define CLOCK_TYPE CLOCK_MONOTONIC_RAW
+#else
+#define CLOCK_TYPE CLOCK_MONOTONIC
+#endif
+#define NSEC_TO_USEC_DIV 1000
+
+ struct timespec spec;
+ (void)clock_gettime(CLOCK_TYPE, &spec);
+
+ tv->tv_sec = spec.tv_sec;
+ tv->tv_usec = spec.tv_nsec / NSEC_TO_USEC_DIV;
+}
+
+uint64_t
+hns3_clock_calctime_ms(struct timeval *tv)
+{
+ return (uint64_t)tv->tv_sec * MSEC_PER_SEC +
+ tv->tv_usec / USEC_PER_MSEC;
+}
+
+uint64_t
+hns3_clock_gettime_ms(void)
+{
+ struct timeval tv;
+
+ hns3_clock_gettime(&tv);
+ return hns3_clock_calctime_ms(&tv);
+}
+
static int
hns3_parse_io_hint_func(const char *key, const char *value, void *extra_args)
{
HNS3_DEVARG_RX_FUNC_HINT "=vec|sve|simple|common "
HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common "
HNS3_DEVARG_DEV_CAPS_MASK "=<1-65535> ");
-RTE_LOG_REGISTER(hns3_logtype_init, pmd.net.hns3.init, NOTICE);
-RTE_LOG_REGISTER(hns3_logtype_driver, pmd.net.hns3.driver, NOTICE);
+RTE_LOG_REGISTER_SUFFIX(hns3_logtype_init, init, NOTICE);
+RTE_LOG_REGISTER_SUFFIX(hns3_logtype_driver, driver, NOTICE);