net/mlx5: fix LAG representor probing on PF1 PCI

[dpdk.git] / drivers / net / hns3 / hns3_ethdev.c

diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index b665554..0589e3f 100644 (file)
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2791,8 +2791,6 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
                .offloads = 0,
        };
 
-       info->vmdq_queue_num = 0;
-
        info->reta_size = hw->rss_ind_tbl_size;
        info->hash_key_size = HNS3_RSS_KEY_SIZE;
        info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
@@ -3075,8 +3073,6 @@ hns3_parse_cfg(struct hns3_cfg *cfg, struct hns3_cmd_desc *desc)
        req = (struct hns3_cfg_param_cmd *)desc[0].data;
 
        /* get the configuration */
-       cfg->vmdq_vport_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
-                                            HNS3_CFG_VMDQ_M, HNS3_CFG_VMDQ_S);
        cfg->tc_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
                                     HNS3_CFG_TC_NUM_M, HNS3_CFG_TC_NUM_S);
        cfg->tqp_desc_num = hns3_get_field(rte_le_to_cpu_32(req->param[0]),
@@ -5608,12 +5604,14 @@ hns3_do_start(struct hns3_adapter *hns, bool reset_queue)
 
        ret = hns3_apply_link_speed(hw);
        if (ret)
-               goto err_config_mac_mode;
+               goto err_set_link_speed;
 
        return 0;
 
-err_config_mac_mode:
+err_set_link_speed:
        (void)hns3_cfg_mac_mode(hw, false);
+
+err_config_mac_mode:
        hns3_dev_release_mbufs(hns);
        /*
         * Here is exception handling, hns3_reset_all_tqps will have the
@@ -6993,9 +6991,11 @@ hns3_fec_set(struct rte_eth_dev *dev, uint32_t mode)
                return ret;
 
        /* HNS3 PMD driver only support one bit set mode, e.g. 0x1, 0x4 */
-       if (!is_fec_mode_one_bit_set(mode))
-               hns3_err(hw, "FEC mode(0x%x) not supported in HNS3 PMD,"
+       if (!is_fec_mode_one_bit_set(mode)) {
+               hns3_err(hw, "FEC mode(0x%x) not supported in HNS3 PMD, "
                             "FEC mode should be only one bit set", mode);
+               return -EINVAL;
+       }
 
        /*
         * Check whether the configured mode is within the FEC capability.
@@ -7600,5 +7600,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_hns3,
                HNS3_DEVARG_RX_FUNC_HINT "=vec|sve|simple|common "
                HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common "
                HNS3_DEVARG_DEV_CAPS_MASK "=<1-65535> ");
-RTE_LOG_REGISTER(hns3_logtype_init, pmd.net.hns3.init, NOTICE);
-RTE_LOG_REGISTER(hns3_logtype_driver, pmd.net.hns3.driver, NOTICE);
+RTE_LOG_REGISTER_SUFFIX(hns3_logtype_init, init, NOTICE);
+RTE_LOG_REGISTER_SUFFIX(hns3_logtype_driver, driver, NOTICE);