net/hns3: support NEON Rx
[dpdk.git] / drivers / net / hns3 / hns3_ethdev.c
index b9ee114..73d5042 100644 (file)
@@ -1410,7 +1410,7 @@ hns3_add_uc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
        struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
        struct hns3_mac_vlan_tbl_entry_cmd req;
        struct hns3_pf *pf = &hns->pf;
-       struct hns3_cmd_desc desc;
+       struct hns3_cmd_desc desc[3];
        char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
        uint16_t egress_port = 0;
        uint8_t vf_id;
@@ -1444,7 +1444,7 @@ hns3_add_uc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
         * it if the entry is inexistent. Repeated unicast entry
         * is not allowed in the mac vlan table.
         */
-       ret = hns3_lookup_mac_vlan_tbl(hw, &req, &desc, false);
+       ret = hns3_lookup_mac_vlan_tbl(hw, &req, desc, false);
        if (ret == -ENOENT) {
                if (!hns3_is_umv_space_full(hw)) {
                        ret = hns3_add_mac_vlan_tbl(hw, &req, NULL);
@@ -2351,6 +2351,12 @@ hns3_dev_configure(struct rte_eth_dev *dev)
        if (ret)
                goto cfg_err;
 
+       hns->rx_simple_allowed = true;
+       hns->rx_vec_allowed = true;
+       hns->tx_simple_allowed = true;
+       hns->tx_vec_allowed = true;
+
+       hns3_init_rx_ptype_tble(dev);
        hw->adapter_state = HNS3_NIC_CONFIGURED;
 
        return 0;
@@ -2472,7 +2478,6 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
                                 DEV_RX_OFFLOAD_RSS_HASH |
                                 DEV_RX_OFFLOAD_TCP_LRO);
-       info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
        info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
                                 DEV_TX_OFFLOAD_TCP_CKSUM |
@@ -2483,7 +2488,7 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
                                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
                                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
                                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
-                                info->tx_queue_offload_capa |
+                                DEV_TX_OFFLOAD_MBUF_FAST_FREE |
                                 hns3_txvlan_cap_get(hw));
 
        info->rx_desc_lim = (struct rte_eth_desc_lim) {
@@ -2501,12 +2506,18 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
        };
 
        info->default_rxconf = (struct rte_eth_rxconf) {
+               .rx_free_thresh = HNS3_DEFAULT_RX_FREE_THRESH,
                /*
                 * If there are no available Rx buffer descriptors, incoming
                 * packets are always dropped by hardware based on hns3 network
                 * engine.
                 */
                .rx_drop_en = 1,
+               .offloads = 0,
+       };
+       info->default_txconf = (struct rte_eth_txconf) {
+               .tx_rs_thresh = HNS3_DEFAULT_TX_RS_THRESH,
+               .offloads = 0,
        };
 
        info->vmdq_queue_num = 0;
@@ -3285,7 +3296,7 @@ hns3_is_rx_buf_ok(struct hns3_hw *hw, struct hns3_pkt_buf_alloc *buf_alloc,
                                        + pf->dv_buf_size;
 
        shared_buf_tc = tc_num * aligned_mps + aligned_mps;
-       shared_std = roundup(max_t(uint32_t, shared_buf_min, shared_buf_tc),
+       shared_std = roundup(RTE_MAX(shared_buf_min, shared_buf_tc),
                             HNS3_BUF_SIZE_UNIT);
 
        rx_priv = hns3_get_rx_priv_buff_alloced(buf_alloc);
@@ -3315,8 +3326,7 @@ hns3_is_rx_buf_ok(struct hns3_hw *hw, struct hns3_pkt_buf_alloc *buf_alloc,
                if (tc_num)
                        hi_thrd = hi_thrd / tc_num;
 
-               hi_thrd = max_t(uint32_t, hi_thrd,
-                               HNS3_BUF_MUL_BY * aligned_mps);
+               hi_thrd = RTE_MAX(hi_thrd, HNS3_BUF_MUL_BY * aligned_mps);
                hi_thrd = rounddown(hi_thrd, HNS3_BUF_SIZE_UNIT);
                lo_thrd = hi_thrd - aligned_mps / HNS3_BUF_DIV_BY;
        } else {
@@ -4745,6 +4755,7 @@ hns3_dev_start(struct rte_eth_dev *dev)
        hw->adapter_state = HNS3_NIC_STARTED;
        rte_spinlock_unlock(&hw->lock);
 
+       hns3_rx_scattered_calc(dev);
        hns3_set_rxtx_function(dev);
        hns3_mp_req_start_rxtx(dev);
        rte_eal_alarm_set(HNS3_SERVICE_INTERVAL, hns3_service_handler, dev);
@@ -4843,6 +4854,7 @@ hns3_dev_stop(struct rte_eth_dev *dev)
                hns3_dev_release_mbufs(hns);
                hw->adapter_state = HNS3_NIC_CONFIGURED;
        }
+       hns3_rx_scattered_reset(dev);
        rte_eal_alarm_cancel(hns3_service_handler, dev);
        rte_spinlock_unlock(&hw->lock);
 }
@@ -5513,6 +5525,7 @@ hns3_reset_service(void *param)
 }
 
 static const struct eth_dev_ops hns3_eth_dev_ops = {
+       .dev_configure      = hns3_dev_configure,
        .dev_start          = hns3_dev_start,
        .dev_stop           = hns3_dev_stop,
        .dev_close          = hns3_dev_close,
@@ -5538,7 +5551,8 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
        .rx_queue_intr_disable  = hns3_dev_rx_queue_intr_disable,
        .rxq_info_get           = hns3_rxq_info_get,
        .txq_info_get           = hns3_txq_info_get,
-       .dev_configure          = hns3_dev_configure,
+       .rx_burst_mode_get      = hns3_rx_burst_mode_get,
+       .tx_burst_mode_get      = hns3_tx_burst_mode_get,
        .flow_ctrl_get          = hns3_flow_ctrl_get,
        .flow_ctrl_set          = hns3_flow_ctrl_set,
        .priority_flow_ctrl_set = hns3_priority_flow_ctrl_set,
@@ -5575,6 +5589,8 @@ static int
 hns3_dev_init(struct rte_eth_dev *eth_dev)
 {
        struct hns3_adapter *hns = eth_dev->data->dev_private;
+       char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
+       struct rte_ether_addr *eth_addr;
        struct hns3_hw *hw = &hns->hw;
        int ret;
 
@@ -5647,6 +5663,15 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
                goto err_rte_zmalloc;
        }
 
+       eth_addr = (struct rte_ether_addr *)hw->mac.mac_addr;
+       if (!rte_is_valid_assigned_ether_addr(eth_addr)) {
+               rte_eth_random_addr(hw->mac.mac_addr);
+               rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
+                               (struct rte_ether_addr *)hw->mac.mac_addr);
+               hns3_warn(hw, "default mac_addr from firmware is an invalid "
+                         "unicast address, using random MAC address %s",
+                         mac_str);
+       }
        rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.mac_addr,
                            &eth_dev->data->mac_addrs[0]);